CY7C4281
CY7C4291
Document #: 38-06007 Rev. *C Page 7 of 16
Switching Characteristics Over the Operating Range
Parameter Description
7C42X1-10 7C42X1-15 7C42X1-25
UnitMin. Max. Min. Max. Min. Max.
t
S
Clock Cycle Frequency 100 66.7 40 MHz
t
A
Data Access Time 2 8 2 10 2 15 ns
t
CLK
Clock Cycle Time 10 15 25 ns
t
CLKH
Clock HIGH Time 4.5 6 10 ns
t
CLKL
Clock LOW Time 4.5 6 10 ns
t
DS
Data Set-up Time 3 4 6 ns
t
DH
Data Hold Time 0.5 1 1 ns
t
ENS
Enable Set-up Time 3 4 6 ns
t
ENH
Enable Hold Time 0.5 1 1 ns
t
RS
Reset Pulse Width
[11]
10 15 25 ns
t
RSS
Reset Set-up Time 8 10 15 ns
t
RSR
Reset Recovery Time 8 10 15 ns
t
RSF
Reset to Flag and Output Time 10 15 25 ns
t
OLZ
Output Enable to Output in Low Z
[12]
0 0 0 ns
t
OE
Output Enable to Output Valid 3 7 3 8 3 12 ns
t
OHZ
Output Enable to Output in High Z
[12]
3 7 3 8 3 12 ns
t
WFF
Write Clock to Full Flag 8 10 15 ns
t
REF
Read Clock to Empty Flag 8 10 15 ns
t
PAF
Clock to Programmable Almost-Full Flag 8 10 15 ns
t
PAE
Clock to Programmable Almost-Full Flag 8 10 15 ns
t
SKEW1
Skew Time between Read Clock and Write Clock for
Empty Flag and Full Flag
5 6 10 ns
t
SKEW2
Skew Time between Read Clock and Write Clock for
Almost-Empty Flag and Almost-Full Flag
10 15 18 ns
Notes:
11. Pulse widths less than minimum values are not allowed.
12. Values guaranteed by design, not currently tested.
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