ADG752
–4–
Table I. Truth Table
ADG752 IN Switch S1 Switch S2
0 ON OFF
1 OFF ON
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG752 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . . –0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . (T
J
Max–T
A
)/θ
JA
Junction Temperature (T
J
Max) . . . . . . . . . . . . . . . . . .+150°C
µSOIC Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
SOT-23 Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
TERMINOLOGY
V
DD
Most positive power supply potential.
GND Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
R
ON
Ohmic resistance between D and S.
∆R
ON
On resistance match between channels, i.e.,
R
ON
max–R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
I
S
(OFF) Source leakage current with the switch “OFF.”
I
D
, I
S
(ON) Channel leakage current with the switch “ON.”
V
D
(V
S
) Analog voltage on terminals D and S.
C
S
(OFF) “OFF” switch source capacitance.
C
D
, C
S
(ON) “ON” switch capacitance.
t
ON
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
t
OFF
Delay between applying the digital control
input and the output switching off.
t
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switch-
ing from one address state to another.
Off Isolation A measure of unwanted signal coupling
through an “OFF” switch.
Crosstalk A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
Bandwidth The frequency at which the output is attenu-
ated by –3 dBs.
On Response The frequency response of the “ON” switch.
Insertion Loss Loss due to the ON resistance of the switch.
V
INL
Maximum input voltage for Logic “0.”
V
INH
Minimum input voltage for Logic “1.”
I
INL
(I
INH
) Input current of the digital input.
I
DD
Positive supply current.
PIN CONFIGURATIONS
6-Lead SOT-23
(RT-6)
1
2
3
6
5
4
TOP VIEW
(Not to Scale)
ADG752
IN
D
V
DD
S1
GND
S2
8-Lead SOIC
(RM-8)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
NC = NO CONNECT
ADG752
NC
NC
S1
D
V
DD
S2
GND
IN
