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ISD4002-120P

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37
ISD4002 SERIES
Publication Release Date: September 2003
- 7 - Revision 1
6. PIN DESCRIPTION
PIN NO. PIN NAME
SOIC /
PDIP
TSOP
FUNCTION
SS
1 9
Slave Select: This input, when LOW, will select the
ISD4002 device.
MOSI 2 10
Master Out Slave IN: This is the serial input to the
ISD4002 device when it is configured as slave. The master
microcontroller places data on the MOSI line one half-cycle
before the rising edge of SCLK for clocking into the device.
MISO 3 11
Master In Slave Out: This is the serial output (open drain)
of the ISD4002 device. This output goes into a high-
impedance state if the device is not selected.
V
SSA
/ V
SSD
11, 12,
23 / 4
1, 17, 18 /
12
Ground: The ISD4002 series utilizes separate analog and
digital ground busses. The analog ground (V
SSA
) pins
should be tied together as close as possible and connected
through a low-impedance path to power supply ground.
The digital ground (V
SSD
) pin should be connected through
a separate low-impedance path to power supply ground.
These ground paths should be large enough to ensure that
the impedance between the V
SSA
pins and the V
SSD
pin is
less than 3 Ω. The backside of the die is connected to V
SS
through the substrate. For chip-on-board design, the die
attach area must be connected to V
SS
or left floating.
NC 5-10, 15,
19-22
3, 4, 13-
16, 19, 21,
23, 27, 28
Not connected
AUD OUT
[1]
13 20
Audio Output: This pin provides an audio output of the
stored data and is recommended be AC coupled. It is
capable of driving a 5 KΩ impedance R
EXT
.
[1]
The AUD OUT pin is always at 1.2 volts when the device is powered up. When in playback, the output buffer
connected to this pin can drive a load as small as 5 KΩ. When in record, a resistor connects AUD OUT to the
internal 1.2-volt analog ground supply. This resistor is approximately 850 KΩ, but will vary somewhat according to
the sample rate of the device. This relatively high impedance allows this pin to be connected to an audio bus
without loading it down.
ISD4002 SERIES
- 8 -
PIN NO. PIN NAME
SOIC /
PDIP
TSOP
FUNCTION
AM CAP 14 22
AutoMute™ Feature: The AutoMute feature only applies
for playback operation and helps to minimize noise (with 6
dB of attenuation) when there is no signal (i.e. during
periods of silence). A 1 µF capacitor to ground is
recommended to connect to the AM CAP pin.
This capacitor becomes a part of an internal peak detector
which senses the signal amplitude. This peak level is
compared to an internally set threshold to determine the
AutoMute trip point. For large signals, the AutoMute
attenuation is set to 0 dB automatically but 6 dB of
attenuation occurs for silence. The 1 µF capacitor also
affects the rate at which the AutoMute feature changes with
the signal amplitude (or the attack time).
The AutoMute feature can be disabled by connecting the
AM CAP pin directly to V
CCA
..
ANA IN- 16 24
Inverting Analog Input: This pin transfers the signal into
the device during recording via differential-input mode.
In this differential-input mode, a 16 mVp-p maximum input
signal should be capacitively coupled to ANA IN- for
optimal signal quality, as shown in Figure 1: ANA IN
Modes. This capacitor value should be equal to that used
on ANA IN+ pin. The input impedance at ANA IN- is
normally 56 KΩ.
In the single-ended mode, ANA IN- should be capacitively
coupled to V
SSA
through a capacitor equal to that used on
the ANA IN+ pin.
ANA IN+ 17 25
Non-Inverting Analog Input: This pin is the non-inverting
analog input that transfers the signal to the device for
recording. The analog input amplifier can be driven single
ended or differentially.
In the single-ended input mode, a 32 mVp-p (peak-to-peak)
maximum signal should be capacitively connected to this
pin for optimal signal quality. The external capacitor
associated with ANA IN+ together with the 3 KΩ input
impedance are selected to give cutoff a the low frequency
end of the voice passband.
In the differential-input mode, the maximum input signal at
ANA IN+ should be 16 mVp-p capacitively coupled for
optimal signal quality. The circuit connections for the two
modes are shown in Figure 1.
ISD4002 SERIES
Publication Release Date: September 2003
- 9 - Revision 1
PIN NO. PIN NAME
SOIC /
PDIP
TSOP
FUNCTION
V
CCA
/ V
CCD
18 / 27 26 / 7
Supply Voltage: To minimize noises, the analog and digital
circuits in the ISD4002 devices use separate power
busses. These +3V busses are brought out to separate
pins and should be tied together as close to the supply as
possible. In addition, these supplies should be decoupled
as close to the package as possible.
RAC 24 2
Row Address Clock: This is an open drain output that
provides the signal of a ROW with a 200 ms period for 8
KHz sampling frequency. (This represents a single row of
memory) This signal stays HIGH for 175 ms and stays
LOW for 25 ms when it reaches the end of a row.
The RAC pin stays HIGH for 109.37 µsec and stays LOW
for 15.63 µsec in Message Cueing mode (see Message
Cueing section for detailed description). Refer to the AC
Parameters table for RAC timing information at other
sample rates.
When a record command is first initiated, the RAC pin
remains HIGH for an extra T
RACL
period. This is due to the
need of loading the internal sample and hold circuits in the
device. This pin can be used for message management
techniques.
A pull-up resistor is required to connect to other device.
INT
25 5
Interrupt: This is an open drain output pin. This pin goes
LOW and stays LOW when an Overflow (OVF) or End of
Message (EOM) marker is detected. Each operation that
ends with an EOM or OVF will generate an interrupt. The
interrupt will be cleared the next time an SPI cycle is
initiated. The interrupt status can also be read by an R
INT
instruction.
A pull-up resistor is required to connect to other device.
Overflow Flag (OVF) – The Overflow flag indicates that the
end of memory has been reached during a record or
playback operation.
End of Message (EOM) – The End of Message flag is set
only during playback operation when an EOM is found.
There are eight EOM flag position options per row.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37

ISD4002-120P

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Buy ISD4002-120P
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Description:
IC VOICE REC/PLAY 120S 28-DIP
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