MAX7324AEG+T Datasheet MAX7324AEG+, MAX7324AEG+T, MAX7324ATG+ | P10-P12

Serial Interface

Serial Addressing

The MAX7324 operates as a slave that sends and

receives data through an I

C interface. The interface

uses a serial-data line (SDA) and a serial-clock line (SCL)

to achieve bidirectional communication between mas-

ter(s) and slave(s). The master initiates all data transfers

to and from the MAX7324 and generates the SCL clock

that synchronizes the data transfer (Figure 1).

SDA operates as both an input and an open-drain out-

put. A pullup resistor, typically 4.7kΩ, is required on

SDA. SCL operates only as an input. A pullup resistor,

typically 4.7kΩ, is required on SCL if there are multiple

masters on the 2-wire interface, or if the master in a sin-

gle-master system has an open-drain SCL output.

Each transmission consists of a START condition sent

by a master, followed by the MAX7324’s 7-bit slave

address plus R/W bit, 1 or more data bytes, and finally

a STOP condition (Figure 2).

START and STOP Conditions

Both SCL and SDA remain high when the interface is

not busy. A master signals the beginning of a transmis-

sion with a START (S) condition by transitioning SDA

from high to low while SCL is high. When the master

has finished communicating with the slave, the master

issues a STOP (P) condition by transitioning SDA from

low to high while SCL is high. The bus is then free for

another transmission (Figure 2).

Bit Transfer

One data bit is transferred during each clock pulse.

The data on SDA must remain stable while SCL is high

(Figure 3).

MAX7324

C Port Expander with Eight Push-Pull Outputs

and Eight Inputs

10 ______________________________________________________________________________________

SDA

SCL

DATA LINE STABLE;

DATA VALID

CHANGE OF DATA

ALLOWED

Figure 3. Bit Transfer

SCL

SDA

BUF

START

CONDITION

STOP

CONDITION

REPEATED START CONDITION

START CONDITION

SU,STO

HD,STA

SU,STA

HD,DAT

SU,DAT

LOW

HIGH

HD,STA

Figure 1. 2-Wire Serial-Interface Timing Details

SDA

SCL

START

CONDITION

STOP

CONDITION

Figure 2. START and STOP Conditions

MAX7324

C Port Expander with Eight Push-Pull Outputs

and Eight Inputs

______________________________________________________________________________________ 11

Acknowledge

The acknowledge bit is a clocked 9th bit the recipient

uses to acknowledge receipt of each byte of data

(Figure 4). Each byte transferred effectively requires 9

bits. The master generates the 9th clock pulse, and the

recipient pulls down SDA during the acknowledge

clock pulse, such that the SDA line is stable low during

the high period of the clock pulse. When the master is

transmitting to the MAX7324, the MAX7324 generates

the acknowledge bit because the MAX7324 is the

recipient. When the MAX7324 is transmitting to the

master, the master generates the acknowledge bit

because the master is the recipient. The master does

not generate an acknowledge prior to issuing a stop

condition.

Slave Address

The MAX7324 has two different 7-bit slave addresses

(Tables 2 and 3). The addresses are different for com-

municating to either the eight push-pull outputs or the

eight inputs. The eighth bit following the 7-bit slave

address is the R/W bit. It is low for a write command

and high for a read command.

The first (A6), second (A5), and third (A4) bits of the

MAX7324 slave address are always 1, 1, and 0 (I0–I7)

or 1, 0, and 1 (O8–O15). Connect AD0 and AD2 to

GND, V+

SDA, or SCL to select the slave address bits

A3, A2, A1, and A0. The MAX7324 has 16 possible

slave address pairs (Tables 2 and 3), allowing up to 16

MAX7324 devices on an I

C bus.

Accessing the MAX7324

The MAX7324 is accessed though an I

C interface. The

MAX7324 provides two different 7-bit slave addresses

for either the eight input ports (I0–I7) or the eight push-

pull ports (O8–O15). See Tables 2 and 3.

A single-byte read from the input ports of the

MAX7324 returns the status of the eight ports and

clears both the internal transition flags and the INT out-

put. A single-byte read from the output ports of the

MAX7324 returns the status of the eight output ports,

read back as inputs.

A 2-byte read from the input ports of the MAX7324

returns the status of the eight ports (as for a single-byte

read), followed by the transition flags. The internal tran-

sition flags and the INT output are cleared when the

MAX7324 acknowledges the slave address byte, but

the previous transition flag data is sent as the second

byte. A 2-byte read from the output ports of the

MAX7324 repeatedly returns the status of the eight out-

put ports, read back as inputs.

A multibyte read (more than 2 bytes before the I

STOP bit) from the input ports of the MAX7324 repeat-

edly returns the port data, alternating with the transition

flags. As the input data is resampled for each transmis-

sion, and the transition flags are reset each time, a

multibyte read continuously returns the current data

and identifies any changing input ports.

SCL

SDA BY

TRANSMITTER

CLOCK PULSE

FOR ACKNOWLEDGEMENT

START

CONDITION

SDA BY

RECEIVER

12 89

Figure 4. Acknowledge

SDA

SCL

1A5

A2 A1 A0

R/W

MSB

LSB

ACK

Figure 5. Slave Address

MAX7324

C Port Expander with Eight Push-Pull Outputs

and Eight Inputs

12 ______________________________________________________________________________________

If a port input data change occurs during the read

sequence, INT is reasserted during the I

C STOP bit.

The MAX7324 does not generate another interrupt dur-

ing a single-byte or multibyte read.

Input-port data is sampled during the preceding I

acknowledge bit (the acknowledge bit for the I

C slave

address in the case of a single-byte or 2-byte read).

A multibyte read (more than 2 bytes before the I

STOP bit) from the output ports of the MAX7324 repeat-

edly returns the status of the eight output ports, read

back as inputs.

A single-byte write to the input ports of the MAX7324

sets the interrupt mask register and clears both the

internal transition flags and INT output.

A single-byte write to the output ports of the MAX7324

sets the logic state of all eight ports.

A multibyte write to the input ports of the MAX7324

sets the interrupt mask register repeatedly.

A multibyte write to the output ports of the MAX7324

repeatedly sets the logic state of all eight ports.

Reading from the MAX7324

A read from the input ports of the MAX7324 starts with

the master transmitting the input ports’ slave address

with the R/W bit set to high. The MAX7324 acknowl-

edges the slave address and samples the ports during

the acknowledge bit. INT deasserts during the slave

address acknowledge.

Typically, the master reads 1 or 2 bytes from the

MAX7324 with each byte being acknowledged by the

master upon reception with the exception of the last

byte.

When the master reads one byte from the open-drain

ports of the MAX7324 and subsequently issues a STOP

condition (Figure 6), the MAX7324 transmits the current

port data, clears the transition flags, and resets the

transition detection. INT deasserts during the slave

acknowledge. The new snapshot data is the current

port data transmitted to the master, and therefore, port

changes occuring during the transmission are detect-

ed. INT remains high until the STOP condition.

SCL

MAX7324 SLAVE ADDRESS

PORTS

ACKNOWLEDGE

FROM MAX7324

ACKNOWLEDGE

FROM MASTER

PORT SNAPSHOT

I2I3I4I5

D0D1D2D3D4D5D6D7

PORT SNAPSHOT

INT OUTPUT

R/W

S = START CONDITION A = ACKNOWLEDGE

P = STOP CONDITION

INT REMAINS HIGH UNTIL STOP CONDITION

Figure 6. Reading Input Ports of the MAX7324 (1 Data Byte)

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

MAX7324AEG+T

Mfr. #:

Buy MAX7324AEG+T

Manufacturer:

Maxim Integrated

Description:

Interface - I/O Expanders I2C Port Expander w/8 P-P Out & 8 In

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MAX7324AEG+T

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