MAX7324
I
2
C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
_______________________________________________________________________________________ 7
A latching interrupt output, INT, is programmed to flag
input data changes on input ports through an interrupt
mask register. By default, data changes on any input
port force INT to a logic-low. The interrupt output INT
and all transition flags are cleared when the MAX7324
is next accessed through the serial interface.
Internal pullup resistors to V+ are selected by the
address select inputs, AD0 and AD2. Pullups are
enabled on the input ports in groups of four (see Table 2).
Initial Power-Up
On power-up, the transition detection logic is reset, and
INT is deasserted. The interrupt mask register is set to
0xFF, enabling the interrupt output for transitions on all
eight input ports. The transition flags are cleared to
indicate no data changes. The power-up default states
of the eight push-pull outputs are set according to the
I
2
C slave address selection inputs, AD0 and AD1 (see
Table 3).
Power-On Reset
The MAX7324 contains an integral power-on-reset
(POR) circuit that ensures all registers are reset to a
known state on power-up. When V+ rises above V
POR
(1.6V max), the POR circuit releases the registers and
2-wire interface for normal operation. When V+ drops
below V
POR
, the MAX7324 resets all register contents
to the POR defaults (Tables 2 and 3).
RST
Input
The RST input voids any I
2
C transaction involving the
MAX7324, forcing the MAX7324 into the I
2
C STOP con-
dition. A reset does not affect the interrupt output (INT).
Standby Mode
When the serial interface is idle, the MAX7324 automat-
ically enters standby mode, drawing minimal supply
current.
Slave Address, Power-Up Default Logic
Levels, and Input Pullup Selection
Address inputs AD0 and AD2 determine the MAX7324
slave address and select which inputs have pullup
resistors. Pullups are enabled on the input ports in
groups of four (see Table 2).
The MAX7324 slave address is determined on each I
2
C
transmission, regardless of whether the transmission is
actually addressing the MAX7324. The MAX7324 distin-
guishes whether address inputs AD0 and AD2 are con-
nected to SDA or SCL instead of fixed logic levels V+
or GND during this transmission. This means that the
MAX7324 slave address can be configured dynamical-
ly in the application without cycling the device supply.
On initial power-up, the MAX7324 cannot decode the
address inputs AD0 and AD2 fully until the first I
2
C
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
PART
I
2
C
SLAVE
ADDRESS
INPUTS
INPUT
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
CONFIGURATION
MAX7323
110xxxx Up to 4
Up to 4 4
4 I/O, 4 output-only versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
MAX7328
MAX7329
0100xxx
0111xxx
Up to 8
Up to 8
PCF8574-, PCF8574A-compatible versions:
8 open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
Table 1. MAX7319–MAX7329 Family Comparison (continued)
MAX7324
I
2
C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
8 _______________________________________________________________________________________
address selection determines which inputs have
pullups applied. However, at power-up, the I
2
C SDA
and SCL bus interface lines are high impedance at the
inputs of every device (master or slave) connected to
the bus, including the MAX7324. This is guaranteed as
part of the I
2
C specification. Therefore, address inputs
AD0 and AD2 that are connected to SDA or SCL during
power-up appear to be connected to V+. The pullup
selection logic uses AD0 to select whether pullups are
enabled for ports I0–I3, and uses AD2 to select whether
pullups are enabled for ports I4–I7. The rule is that a
logic-high SDA, or SCL connection selects the pullups,
while a logic-low deselects the pullups (Table 2). The
pullup configuration is correct on power-up for a stan-
dard I
2
C configuration, where SDA and SCL are pulled
up to V+ by the external I
2
C pullups.
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true—for example,
in applications in which there is legitimate bus activity
during power-up. Also, if SDA and SCL are terminated
with pullup resistors to a different supply voltage than
the MAX7324’s supply voltage, and if that pullup supply
rises later than the MAX7324’s supply, then SDA or
SCL may appear at power-up to be connected to GND.
In such applications, use the four address combina-
tions that are selected by connecting address inputs
AD0 and AD2 to V+ or GND (shown in bold in Tables 2
and 3). These selections are guaranteed to be correct
at power-up, independent of SDA and SCL behavior. If
one of the other 12 address combinations is used, an
unexpected combination of pullups might be asserted
until the first I
2
C transmission (to any device, not neces-
sarily the MAX7324) is put on the bus.
Port Inputs
Port inputs switch at CMOS logic levels as determined
by the expander’s supply voltage, and are overvoltage
tolerant to +6V, independent of the device’s supply
voltage.
Port-Input Transition Detection
All eight input ports are monitored for changes since
the expander was last accessed through the serial
interface. The state of the input ports is stored in an
internal “snapshot” register for transition monitoring.
The snapshot is continuously compared with the actual
input conditions, and if a change is detected for any
port input, then an internal transition flag is set for that
port. The eight port inputs are sampled (internally
latched into the snapshot register) and the old transi-
tion flags cleared during the I
2
C acknowledge of every
MAX7324 read and write access. The previous port
transition flags are read through the serial interface as
the second byte of a 2-byte read sequence.
PIN CONNECTION
DEVICE ADDRESS
40k INPUT PULLUP ENABLED
AD2 AD0
A6 A5 A4 A3 A2 A1 A0
I7 I6 I5 I4 I3 I2 I1 I0
SCL GND1100000YYYY
——
SCL V+ 1100001YYYYYYYY
SCL SCL 1100010YYYYYYYY
SCL SDA 1100011YYYYYYYY
SDA GND1100100YYYY
——
SDA V+ 1100101YYYYYYYY
SDA SCL 1100110YYYYYYYY
SDA SDA 1100111YYYYYYYY
GND GND1101000
———————
GND V+ 1101001
————
YYYY
GND SCL 1101010
————
YYYY
GND SDA 1101011
————
YYYY
V+ GND1101100YYYY
——
V+ V+ 1101101YYYYYYYY
V+ SCL 1101110YYYYYYYY
V+ SDA 1101111YYYYYYYY
Table 2. MAX7324 Address Map for Inputs I0–I7
MAX7324
I
2
C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
_______________________________________________________________________________________ 9
A long read sequence (more than 2 bytes) can be used
to poll the expander continuously without the overhead
of resending the slave address. If more than 2 bytes
are read from the expander, the expander repeatedly
returns the 2 bytes of input port data followed by the
transition flags. The inputs are repeatedly resampled
and the transition flags repeatedly reset for each pair of
bytes read. All changes that occur during a long read
sequence are detected and reported.
The MAX7324 includes an 8-bit interrupt mask register
that selects which inputs generate an interrupt upon
change. Each input’s transition flag is set when its input
changes, independent of the interrupt mask register
settings. The interrupt mask register allows the proces-
sor to be interrupted for critical events, while the inputs
and the transition flags can be polled periodically to
detect less critical events.
The INT output is not reasserted during a read
sequence to avoid recursive reentry into an interrupt
service routine. Instead, if a data change occurs that
would normally cause the INT output to be set, the INT
assertion is delayed until the STOP condition. INT is not
reasserted upon a STOP condition if the changed input
data is read before the STOP occurs. The INT logic
ensures that unnecessary interrupts are not asserted,
yet data changes are detected and reported no matter
when the change occurs.
Transition-Detection Masks
The transition detection logic incorporates a transition
flag and an interrupt mask bit for each input port. The
eight transition flags can be read through the serial
interface, and the 8-bit interrupt mask is set through the
serial interface.
Each port’s transition flag is set when that port’s input
changes, and the change flag remains set even if the
input returns to its original state. The port’s interrupt
mask determines whether a change on that input port
generates an interrupt. Enable interrupts for high-priori-
ty inputs using the interrupt mask. The interrupt allows
the system to respond quickly to changes on these
inputs. Poll the MAX7324 periodically to monitor less-
important inputs. The transition flags indicate whether a
permanent or transient change has occurred on any
input since the MAX7324 was last accessed.
PIN CONNECTION
DEVICE ADDRESS OUTPUTS POWER-UP DEFAULT
AD2 AD0
A6 A5 A4 A3 A2 A1 A0 O15 O14 O13 O12 O11 O10 O9
O8
SCL GND
1010000
11110000
SCL V+
1010001
11111111
SCL SCL
1010010
11111111
SCL SDA
1010011
11111111
SDA GND
1010100
11110000
SDA V+
1010101
11111111
SDA SCL
1010110
11111111
SDA SDA
1010111
11111111
GND GND
1011000
00000000
GND V+
1011001
00001111
GND SCL
1011010
00001111
GND SDA
1011011
00001111
V+ GND
1011100
11110000
V+ V+
1011101
11111111
V+
SCL
1011110
11111111
V+
SDA
1011111
11111111
Table 3. MAX7324 Address Map for Outputs O8–O15

MAX7324AEG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders I2C Port Expander w/8 P-P Out & 8 In
Lifecycle:
New from this manufacturer.
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