11
A6 A5 A4 A3 A2 A1 A0 W AS A PD7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Master sends
slave address
Master writes
register address
Master writes
register data
Master will write dataStart condition Stop condition
Slave acknowledge
A
Slave acknowledgeSlave acknowledge
Data format
ADJD-S313 uses a register-based programming
architecture. Each register has a unique address and
controls a specific function inside the chip.
To write to a register, the master first generates a
START condition. Then it sends the slave address
for the device it wants to communicate with. The
least significant bit (LSB) of the slave address must
indicate that the master wants to write to the slave.
The addressed device will then acknowledge the
master.
The master writes the register address it wants to
access and waits for the slave to acknowledge. The
master then writes the new register data. Once the
slave acknowledges, the master generates a STOP
condition to end the data transfer.
Figure 8. Register Byte Write Protocol
A6 A5 A4 A3 A2 A1 A0 W AS D7 D6 D5 D4 D3 D2 D1 D0
Master will write dataStart condition
Slave acknowledge
A PD7 D6 D5 D4 D3 D2 D1 D0
Stop condition
A6 A5 A4 A3 A2 A1 A0 RSr
Master will read data
Repeated start
condition
Slave acknowledge
A
Master not
acknowledge
A
Slave acknowledge
Master sends
slave address
Master writes
register address
Master sends
slave address
Master reads
register data
To read from a register, the master first generates
a START condition. Then it sends the slave address
for the device it wants to communicate with. The
least significant bit (LSB) of the slave address must
indicate that the master wants to write to the slave.
The addressed device will then acknowledge the
master.
The master writes the register address it wants to
access and waits for the slave to acknowledge. The
master then generates a repeated START condition
and resends the slave address sent previously. The
least significant bit (LSB) of the slave address must
indicate that the master wants to read from the
slave. The addressed device will then acknowledge
the master.
The master reads the register data sent by the slave
and sends a no acknowledge signal to stop reading.
The master then generates a STOP condition to end
the data transfer.
Figure 9. Register Byte Read Protocol
