LTC4150CMS#TRPBF Datasheet LTC4150CMS#PBF, LTC4150IMS#PBF, LTC4150CMS#TRPBF | P7-P9

LTC4150

4150fc

OPERATION

Charge is the time integral of current. The LTC4150 mea-

sures battery current by monitoring the voltage developed

across a sense resistor and then integrates this information

in several stages to infer charge. The Block Diagram shows

the stages described below. As each unit of charge p asses

into or out of the battery, the LTC4150 INT pin interrupts

an external microcontroller and the POL pin reports the

polarity of the charge unit. The external microcontroller

then resets INT with the CLR input in preparation for the

next interrupt issued by the LTC4150. The value of each

charge unit is determined by the sense resistor value and

the sense voltage to interrupt frequency gain G

of the

LTC4150.

Power-On and Start-Up Initialization

When power is ﬁ rst applied to the LTC4150, all internal

circuitry is reset. After an initialization interval, the LTC4150

begins counting charge. This in ter val depends on V

and

the voltage across the sense resistor but will be at least

5ms. It may take an additional 80ms for the LTC4150 to

accurately track the sense voltage. An internal undervoltage

lockout circuit monitors V

and resets all circuitry when

falls below 2.5V.

Asserting SHDN low also resets the LTC4150’s internal

circuitry and reduces the supply current to 1.5μA. In this

condition, POL and INT outputs are high impedance. The

LTC4150 resumes counting after another initialization

interval. Shutdown minimizes battery drain when both

the charger and load are off.

CHARGE COUNTING

First, the current measurement is ﬁ ltered by capacitor C

connected across pins C

and C

–

. This averages fast

changes in current arising from ripple, noise and spikes

in the load or charging current.

Second, the ﬁ lter’s output is applied to an integrator with

the ampliﬁ er and 100pF capacitor at its core. When the

integrator output ramps to REFHI or REFLO levels, switches

S1 and S2 reverse the ramp direction. By observing the

condition of S1 and S2 and the ramp direction, polarity is

determined. The integrating interval is trimmed to 600μs

at 50mV full-scale sense voltage.

Third, a counter is incremented or decremented every

time the integrator changes ramp direction. The counter

effectively increases integration time by a factor of 1024,

greatly reducing microcontroller overhead required to

service interrupts from the LTC4150.

At each counter under or overﬂ ow, the INT output latches

low, ﬂ agging a microcontroller. Simultaneously, the POL

output is latched to indicate the polarity of the observed

charge. With this information, the microcontroller can

total the charge over long periods of time, developing

an accurate estimate of the battery’s condition. Once the

interrupt is recognized, the microcontroller resets INT with

a low going pulse on CLR and awaits the next interrupt.

Alternatively, INT can drive CLR.

LTC4150

4150fc

APPLICATIONS INFORMATION

SENSE VOLTAGE INPUT AND FILTERS

Since the overall integration time is set by internally trim-

ming the LTC4150, no external timing capacitor or trimming

is necessary. The only external component that affects

the transfer function of interrupts per coulomb of charge

is the sense resistor, R

SENSE

. The common mode range

for the SENSE

and SENSE

–

pins is V

±60mV, with a

maximum differential voltage range of ±50mV. SENSE

normally tied to V

, so there is no common mode issue

when SENSE

–

operates within the 50mV differential limit

relative to SENSE

Choose R

SENSE

to provid e 5 0mV drop at ma x imum ch ar ge

or discharge current, whichever is greater. Calculate

SENSE

from:

SENSE

MAX

(1)

The sense input range is small (±50mV) to minimize the

loss across R

SENSE

. To preserve accuracy, use Kelvin

connections at R

SENSE

The external ﬁ lter capacitor, C

, operates against a total

on-chip resistance of 4k to form a lowpass ﬁ lter that

averages battery current and improves accuracy in the

presence of noise, spikes and ripple. 4.7μF is recom-

mended for general applications but can be extended to

higher values as long as the capacitor’s leakage is low.

A 10nA leakage is roughly equivalent to the input offset

error of the integrator. Ceramic capacitors are suitable

for this use.

Switching regulators are a particular concern because

they generate high levels of current ripple which may ﬂ ow

through the battery. The V

and SENSE

connection to

the charger and load should be bypassed by at least 4.7μF

at the LTC4150 if a switching regulator is present.

The LTC4150 maintains high accuracy even when Burst

Mode

switching regulators are used. Burst pulse “on”

levels must be within the speciﬁ ed differential input volt-

age range of 50mV as measured at C

and C

–

. To retain

accurate charge information, the LTC4150 must remain

enabled during Burst Mode operation. If the LTC4150

shuts down or V

drops below 2.5V, the part resets and

charge information is lost.

Coulomb Counting

The LTC4150’s transfer function is quantiﬁ ed as a volt-

age to frequency gain G

, where output frequency is the

number of interrupts per second and input voltage is the

differential drive V

SENSE

across SENSE

and SENSE

–

. The

number of interrupts per second will be:

f = G

• ⏐V

SENSE

⏐ (2)

where

SENSE

= I

BATTERY

• R

SENSE

(3)

Therefore,

f = G

• ⏐I

BATTERY

• R

SENSE

⏐ (4)

Since I • t = Q, coulombs of battery charge per INT pulse

can be derived from Equation 4:

One INT

Coulombs

VF SENSE

•

(5)

Battery capacity is most often expressed in ampere-

hours.

1Ah = 3600 Coulombs (6)

Combining Equations 5 and 6:

One INT

VF SENSE

3600 • •

[Ah] (7)

1Ah = 3600 • G

• R

SENSE

Interrupts (8)

The charge measurement may be further scaled within

the microcontroller. However, the number of interrupts,

coulombs or Ah all represent battery charge.

The LTC4150’s transfer function is set only by the value

of the sense resistor and the gain G

. Once R

SENSE

selected using Equation 1, the charge per interrupt can

be determined from Equation 5 or 7.

Note that R

SENSE

is not chosen to set the relationship

between ampere-hours of battery charge and number of

interrupts issued by the LTC4150. Rather, R

SENSE

is chosen

to keep the maximum sense voltage equal to or less than

the LTC4150’s 50mV full-scale sense input.

LTC4150

4150fc

APPLICATIONS INFORMATION

INT, POL and CLR

INT asserts low each time the LTC4150 measures a unit

of charge. At the same time, POL is latched to indicate

the polarity of the charge unit. The integrator and counter

continue running, so the microcontroller must service and

clear the interrupt before another unit of charge accumu-

lates. Otherwise, one measurement will be lost. The time

available between interrupts is the reciprocal of

Equation 2:

Time per INT Assertion =

•⏐V

SENSE

⏐

(9)

At 50mV full scale, the minimum time available is 596ms.

To be conservative and accommodate for small, unex-

pected excursions above the 50mV sense voltage limit, the

microcontroller should process the interrupt and polarity

information and clear INT within 500ms.

Toggling CLR low for at least 20μs resets INT high and

unlatches POL. Since the LTC4150’s integrator and counter

operate independently of the INT and POL latches, no

charge information is lost during the latched period or

while CLR is low. Charge/discharge information contin-

ues to accumulate during those intervals and accuracy

is unaffected.

Once cleared, INT idles in a high state and POL indicates

real-time polarity of the battery current. POL high indicates

charge ﬂ owing into the battery and low indicates charge

ﬂ owing out. Indication of a polarity change requires at

least:

POL

VF SENSE

1024••⏐⏐

(10)

where V

SENSE

is the smallest sense voltage magnitude

before and after the polarity change.

Open-drain outputs POL and INT can sink I

= 1.6mA

at V

= 0.5V. The minimum pull-up resistance for these

pins should be:

> (V

– 0.5)/1.6mA (11)

where V

is the logic supply voltage. Because speed isn’t

an issue, pull-up resistors of 10k or higher are adequate.

Interfacing to INT, POL, CLR and SHDN

The LTC4150 operates directly from the battery, while in

most cases the microcontroller supply comes from some

separate, regulated source. This poses no problem for INT

and POL because they are open-drain outputs and can

be pulled up to any voltage 9V or less, regardless of the

voltage applied to the LTC4150’s V

CLR and SHDN inputs require special attention. To drive

them, the microcontroller or external logic must generate

a minimum logic high level of 1.9V. The maximum input

level for these pins is V

+ 0.3V. If the microcontroller’s

supply is more than this, resistive dividers must be used

on CLR and SHDN. The schematic in Figure 6 shows an

application with INT driving CLR and microcontroller V

> V

. The resistive dividers on CLR and SHDN keep the

voltages at these pins within the LTC4150’s V

range.

Choose R2 and R1 so that:

(R1 + R2) ≥ 50R

(12)

.()V

V V Minimum

CC DD

≤

(13)

Equation 13 also applies to the selection of R3 and R4.

The minimum V

is the lowest supply to the LTC4150

when the battery powering it is at its lowest discharged

voltage.

When the battery is removed in any application, the CLR

and SHDN inputs are unpredictable. INT and POL outputs

may be erratic and should be ignored until after the bat-

tery is replaced.

If desired, the simple logic of Figure 4 may be used to

derive separate charge and discharge pulse trains from

INT and POL.

INT

CHARGE

DISCHARGE

CLR

POL

LTC4150

4150 F04

Figure 4. Unravelling Polarity—

Separate Charge and Discharge Outputs

P1-P3 P4-P6 P7-P9 P10-P12 P13-P14

LTC4150CMS#TRPBF

Mfr. #:

Buy LTC4150CMS#TRPBF

Manufacturer:

Analog Devices / Linear Technology

Description:

Battery Management Coulomb Counter/Bat Gas Gauge

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LTC4150CMS#TRPBF

LTC4150CMS#TRPBF

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