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STF8NK85Z

P1-P3P4-P6P7-P9P10-P12P13-P15
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1.1 Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Table 4. Gate-source zener diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
BV
GSO
Gate-source breakdown voltage Igs=± 1mA (Open Drain) 30 V
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2 Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 5. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown voltage
I
D
=1MA, V
GS
= 0
850 V
I
DSS
Zero Gate voltage
Drain current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125°C
1
50
µA
µA
I
GSS
Gate-body leakage
Current (V
DS
= 0)
V
GS
= ± 20 V
± 10 µA
V
GS(th)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 100 µA
33.754.5 V
R
DS(on)
Static drain-source on
resistance
V
GS
= 10 V, I
D
= 3.35 A
1.1 1.4 Ω
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
g
fs
(1)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
Forward transconductance V
DS
= 15v, I
D
= 3.35 A 6 S
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0
1870
190
44
pF
pF
pF
C
oss eq.
(2)
2. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
.
Equivalent output
capacitance
V
DS
=0V, V
DS
= 0V to 680V 75 pF
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 425 V, I
D
= 3.35 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 18)
26
19
58
18
ns
ns
ns
ns
t
r(Voff)
t
r
t
c
Off-voltage rise time
Fall time
Cross-over time
V
DD
= 680 V, I
D
= 6.7 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 20)
12
10
24
ns
ns
ns
Q
g
Q
gs
Q
gd
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 680 V, I
D
= 6.7 A,
V
GS
= 10 V
(see Figure 19)
60
12
35
84
nC
nC
nC
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Table 7. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
(1)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
Source-drain current
Source-drain current (pulsed)
6.7
26.7
A
A
V
SD
(2)
2. Pulse width limited by safe operating area
Forward on voltage
I
SD
= 6.7 A, V
GS
= 0
1.6 V
t
rr
Q
rr
I
RRM
Reverse recovery time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 6.7 A, di/dt = 100
A/µs
V
DD
= 35 V, Tj = 25°C
(see Figure 20)
530
4.5
17
ns
µC
A
t
rr
Q
rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 6.7 A, di/dt = 100
A/µs
V
DD
= 35 V, Tj = 150°C
(see Figure 20)
690
6.4
17
ns
µC
A
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P1-P3P4-P6P7-P9P10-P12P13-P15

STF8NK85Z

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Manufacturer:
STMicroelectronics
Description:
MOSFET N Ch 850V 1.1Ohm 6.7A
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