EFC3C001NUZTCG Datasheet EFC3C001NUZTCG | P1-P3

1 Publication Order Number :

EFC3C001NUZ/D

www.onsemi.com

June 2016 - Rev. 0

EFC3C001NUZ

Power MOSFET

for 1-2 Cells Lithium-ion Battery Protection

20V, 30mΩ, 6A, Dual N-Channel

This Power MOSFET features a low on-state resistance. This device is

suitable for applications such as power switches of portable machines. Best

suited for 1-2 cells lithium-ion battery applications.

Features

 2.5V drive

 Common-Drain type

 ESD Diode-Protected Gate

 Pb-Free, Halogen Free and RoHS compliance

Applications

 1-2 Cells Lithium-ion Battery Charging and Discharging Switch

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS at Ta = 25C

(Note 1)

Parameter Symbol Value Unit

Source to Source Voltage V

SSS

20 V

Gate to Source Voltage

V

GSS

10 V

Source Current (DC) I

S

6 A

Source Current (Pulse)

PW100s, duty cycle1%

I

SP

60

A

Total Dissipation (Note 2)

P

T

1.6 W

Junction Temperature

Tj 150 C

Storage Temperature

Tstg 55 to +150 C

Note 1 : Stresses exceeding those listed in the Maximum Ratings table may damage

the device. If any of these limits are exceeded, device functionality should not

be assumed, damage may occur and reliability may be affected.

THERMAL RESISTANCE RATINGS

Parameter Symbol Value Unit

Junction to Ambient (Note 2)

R

JA

78.1

C/W

Note 2 : Surface mounted on ceramic substrate(5000mm

2



0.8mm).

ELECTRICAL CONNECTION

N-Channel

V

SSS

R

SS

(on) Max I

S Max

20V

30mΩ@ 4.5V

6A

34mΩ@ 3.8V

39mΩ@ 3.1V

56mΩ@ 2.5V

MARKING

WLCSP4, 1.26×1.26

/

EFCP1313-4DG-020

wc

LOT No.

ORDERING INFORMATION

See detailed ordering and shipping

information on page 6 of this data sheet.

4

1

3

2

Rg=500

Rg

1:Source1

2:Gate1

3:Gate2

4:Source2

EFC3C001NUZ

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2

ELECTRICAL CHARACTERISTICS at Ta  25C

(Note 3)

Parameter Symbol Conditions

Value

Unit

min typ max

Source to Source Breakdown Voltage

V(

BR

)

SSS

I

S

=1mA, V

GS

=0V Test Circuit 1 20 V

Zero-Gate Voltage Source Current I

SSS

V

SS

=20V, V

GS

=0V Test Circuit 1 1 A

Gate to Source Leakage Current I

GSS

V

GS

=8V, V

SS

=0V Test Circuit 2 1 A

Gate Threshold Voltage V

GS

(th) V

SS

=10V, I

S

=1mA Test Circuit 3 0.5 1.3 V

Static Source to Source On-State

Resistance

R

SS

(on)1 I

S

=2A, V

GS

=4.5V Test Circuit 4 17 23 30 m

R

SS

(on)2 I

S

=2A, V

GS

=3.8V Test Circuit 4

19.5 26 34

m

R

SS

(on)3 I

S

=2A, V

GS

=3.1V Test Circuit 4

21 28 39

m

R

SS

(on)4 I

S

=2A, V

GS

=2.5V Test Circuit 4

24.5 35 56

m

Turn-ON Delay Time

t

d

(on)

V

SS

=10V, V

GS

=4.5V, I

S

=2A

Test Circuit 5

50 ns

Rise Time

t

r

350 ns

Turn-OFF Delay Time

t

d

(off)

42,000

ns

Fall Time

t

f

47,000

ns

Total Gate Charge

Qg

V

SS

=10V, V

GS

=4.5V, I

S

=6A

Test Circuit 6 15 nC

Forward Source to Source Voltage

V

F

(

S-S

)

I

S

=2A, V

GS

=0V Test Circuit 7 0.81 1.2 V

Note 3 : Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.

Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

EFC3C001NUZ

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3

Test circuits are example of measuring FET1 side

When FET2 is measured, the position of FET1 and FET2 is switched.

G2

G1

S1

S2

A

G2

G1

S1

S2

A

G2

G1

S1

S2

A

G2

G1

S1

S2

V

IS

Test Circuit 1

V

SSS

/ I

SSS

Test Circuit 2

I

GSS

Test Circuit 3

V

GS

(th)

Test Circuit 4

Test Circuit 5

R

SS

(on)

V

GS

V

GS

V

GS

When FET1 is measured,

Gate and Source of FET2

are short-circuited.

When FET1 is measured,

Gate and Source of FET2

are short-circuited.

V

SS

V

SS

G2

G1

S1

S2

PG

RL

A

Test Circuit 7

Qg

I

G

=1mA

V

SS

When FET1 is measure

d,

Gate and Source of FET

2

are short-circuited.

G2

G1

S1

S2

V

PG

RL

Test Circuit 6

t

d

(on), t

r

, t

d

(off), t

f

V

SS

When FET1 is measured,

Gate and Source of FET2

are short-circuited.

G2

G1

S1

S2

V

I

S

VGS=0V

V

F(S-S)

When FET1 is

measured,+4.5V is added to

V

GS

of FET2.

EFC3C001NUZTCG

EFC3C001NUZTCG

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