12
ICS9250-28
Group Skews (CPU 66 MHz, SDRAM 100MHz)
T
A
= 0 - 70º C; V
DD
= 3.3 V +/-5%, V
DDL
= 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
efer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CPU to SDRAM Skew
1
T
sk1 CPU-SDRAM
-3 -2.7 -2 ns
Skew Window
1
T
1 CPU-SDRAM
0 165 500 ps
CPU to 3V66 Skew
1
T
sk1 CPU-3V66
77.68ns
Skew Window
1
T
1 CPU-3V66
0 105 500 ps
SDRAM to 3V66 Skew
1
T
sk1 SDRAM-3V66
-500 180 500 ps
Skew Window
1
T
1 SDRAM-3V66
0 210 500 ps
3V66 to PCI Skew
1
T
sk1 3V66-PCI
1.5 2.1 3.5 ns
Skew Window
1
T
1 3V66-PCI
0 90 500 ps
OAPIC to PCI Skew
1
T
sk1 IOAPIC-PCI
-1 -0.1 1 ns
Skew Window
1
T
w1 IOAPIC-PCI
001ns
1
Guaranteed by design, not 100% tested in production.
Group Skews (CPU 100 MHz, SDRAM 100MHz)
T
A
= 0 - 70º C; V
DD
= 3.3 V +/-5%, V
DDL
= 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
efer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CPU to SDRAM Skew
1
T
sk2 CPU-SDRAM
4.5 4.9 5.5 ns
Skew Window
1
T
2 CPU-SDRAM
0 180 500 ps
CPU to 3V66 Skew
1
T
sk2 CPU-3V66
4.5 5 5.5 ns
Skew Window
1
T
2 CPU-3V66
0 100 500 ps
SDRAM to 3V66 Skew
1
T
sk2 SDRAM-3V66
-500 175 500 ps
Skew Window
1
T
2 SDRAM-3V66
0 200 500 ps
3V66 to PCI Skew
1
T
sk2 3V66-PCI
1.5 2.1 3.5 ns
Skew Window
1
T
2 3V66-PCI
0 90 500 ps
OAPIC to PCI Skew
1
T
sk2 IOAPIC-PCI
-1 -0.1 1 ns
Skew Window
1
T
w2 IOAPIC-PCI
001ns
1
Guaranteed by design, not 100% tested in production.
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM, 3V66 @ 1.5 V
3V66, PCI @ 1.5 V
IOAPIC @ 1.25 V, PCI @ 1.5 V
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM, 3V66 @ 1.5 V
3V66, PCI @ 1.5 V
IOAPIC @ 1.25 V, PCI @ 1.5 V