PCF8598C-2
1024 × 8-bit CMOS EEPROM with I
2
C-bus interface
Rev. 06 — 22 October 2004 Product data
1. Description
The PCF8598C-2 is a floating gate Electrically Erasable Programmable Read Only
Memory (EEPROM) with 8 kbits (1024 × 8-bit) non-volatile storage. By using an
internal redundant storage code, it is fault tolerant to single bit errors. This feature
dramatically increases the reliability compared to conventional EEPROMs. Power
consumption is low due to the full CMOS technology used. The programming voltage
is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I
2
C-bus. Up to two
PCF8598C-2 devices may be connected to the I
2
C-bus. Chip select is accomplished
by one address input (A2).
Timing of the E/W cycle is carried out internally, thus no external components are
required. Programming Time Control (PTC), Pin 7, must be connected to either V
DD
or left open-circuit. There is an option of using an external clock for timing the length
of an E/W cycle.
2. Features
Low power CMOS:
2.0 mA maximum operating current
maximum standby current 10 µA (at 6.0 V), typical 4 µA
Non-volatile storage of 8 kbits organized as 1024 × 8-bit
Single supply with full operation down to 2.5 V
On-chip voltage multiplier
Serial input/output I
2
C-bus
Write operations:
byte write mode
8-byte page write mode (minimizes total write time per byte)
Read operations:
sequential read
random read
Internal timer for writing (no external components)
Internal power-on reset
0 kHz to 100 kHz clock frequency
High reliability by using a redundant storage code
Endurance: 1,000,000 Erase/Write (E/W) cycles at T
amb
=22°C
10 years non-volatile data retention time
Philips Semiconductors
PCF8598C-2
1024 × 8-bit CMOS EEPROM with I
2
C-bus interface
Product data Rev. 06 — 22 October 2004 2 of 21
9397 750 14219
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Offered in DIP8 and SO8 packages.
3. Quick reference data
4. Ordering information
4.1 Ordering options
Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DD
supply voltage 2.5 - 6.0 V
I
DDR
supply current read f
SCL
= 100 kHz
V
DD
= 2.5 V - - 60 µA
V
DD
= 6 V - - 200 µA
I
DDW
supply current E/W f
SCL
= 100 kHz
V
DD
= 2.5 V - - 0.6 mA
V
DD
= 6 V - - 2.0 mA
I
DD(stb)
standby supply current V
DD
= 2.5 V - - 3.5 µA
V
DD
=6V --10µA
Table 2: Ordering information
Type number Package
Name Description Version
PCF8598C-2P/02 DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1
PCF8598C-2T/02 SO8 plastic small outline package 8 leads;
body width 7.5 mm
SOT176-1
Table 3: Ordering options
Type number Topside mark
PCF8598C-2P/02 PCF8598C-2
PCF8598C-2T/02 8598C-2
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
Philips Semiconductors
PCF8598C-2
1024 × 8-bit CMOS EEPROM with I
2
C-bus interface
9397 750 14219
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 06 — 22 October 2004 3 of 21
5. Block diagram
Fig 1. Block diagram.
002aaa254
TEST MODE DECODER
POWER-ON-RESET
I
2
C-BUS CONTROL LOGIC
SEQUENCER
ADDRESS
HIGH
REGISTER
BYTE
COUNTER
DIVIDER
( 128)
EE
CONTROL
TIMER
( 16)
EEPROM
ADDRESS
POINTER
BYTE
LATCH
(8 bytes)
SHIFT
REGISTER
ADDRESS
SWITCH
INPUT
FILTER
OSCILLATOR
8
4
3
n
7
PTC
PCF8598C-2
4
V
SS
A2
3
8
V
DD
6
5
SCL
SDA
1
WP

PCF8598C-2P/02,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC EEPROM 8K I2C 100KHZ 8DIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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