ADG858 Data Sheet
Rev. B | Page 12 of 16
TERMINOLOGY
I
DD
Positive supply current.
V
D
(V
S
)
Analog voltage on Terminal D and Terminal S.
R
ON
Ohmic resistance between Terminal D and Terminal S.
R
FLAT
(ON)
The difference between the maximum and minimum values of
on resistance as measured on the switch.
ΔR
ON
On resistance match between any two channels.
I
S
(Off)
Source leakage current with the switch off.
I
D
(Off)
Drain leakage current with the switch off.
I
D
, I
S
(On)
Channel leakage current with the switch on.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
INL
(I
INH
)
Input current of the digital input.
C
S
(Off)
Off switch source capacitance. Measured with reference to
ground.
C
D
(Off)
Off switch drain capacitance. Measured with reference to
ground.
C
D
, C
S
(On)
On switch capacitance. Measured with reference to ground.
C
IN
Digital input capacitance.
t
ON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
t
OFF
Delay time between the 50% and 90% points of the digital input
and switch off condition.
t
BBM
On or off time measured between the 80% points of both
switches when switching from one to another.
Charge Injection
Measure of the glitch impulse transferred from the digital input
to the analog output during on/off switching.
Off Isolation
Measure of unwanted signal coupling through an off switch.
Crosstalk
Measure of unwanted signal that is coupled from one channel to
another because of parasitic capacitance.
−3 dB Bandwidth
Frequency at which the output is attenuated by 3 dB.
On Response
Frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
Ratio of the harmonics amplitude plus noise of a signal to the
fundamental.
Data Sheet ADG858
Rev. B | Page 13 of 16
OUTLINE DIMENSIONS
081308-D
0.40
BSC
1
5
13
9
PIN 1
IDENTIFIER
TOP VIEW
BOTTOM VIEW
SEATING
PLANE
0.20 DIA
TYP
0.60
0.55
0.50
2.10 SQ
0.25
0.20
0.15
0.40
0.35
0.30
0.35
0.30
0.25
0.05 MAX
0.02 NOM
COPLANARITY
0.05
Figure 26. 16-Lead Lead Frame Chip Scale Package [LFCSP_UQ]
2.10 mm × 2.10 mm Body, Ultra Thin Quad
(CP-16-15)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADG858BCPZ-REEL7
1
−40°C to +85°C 16-Lead Lead Frame Chip Scale Package [LFCSP_UQ] CP-16-15 11
1
Z = RoHS Compliant Part.
ADG858 Data Sheet
Rev. B | Page 14 of 16
NOTES

ADG858BCPZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs IC Quad SPDT 2:1 Mux
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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