MC10H016FNR2G

Semiconductor Components Industries, LLC, 2016
August, 2016 Rev. 9
1 Publication Order Number:
MC10H016/D
MC10H016
4‐Bit Binary Counter
Description
The MC10H016 is a high-speed synchronous, pre-settable,
cascadable 4-bit binary counter. It is useful for a large number of
conversion, counting and digital integration applications.
Features
Counting Frequency, 200 MHz Minimum
Improved Noise Margin 150 mV
(Over Operating Voltage and Temperature Range)
Voltage Compensated
MECL 10K Compatible
Positive Edge Triggered
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
Figure 1. Pin Assignment
V
CC1
Q1
Q0
TC
PE
CE
PO
V
EE
V
CC2
Q2
Q3
CP
MR
P3
P2
P1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual-in-Line Package
Table 1. TRUTH TABLE
CE PE MR CP Function
L
H
L
H
X
X
L
L
H
H
X
X
L
L
L
L
L
H
Z
Z
Z
Z
ZZ
X
Load Parallel (P
n
to Q
n
)
Load Parallel (P
n
to Q
n
)
Count
Hold
Masters Respond; Slaves Hold
Reset (Q
n
= LOW, T
C
= HIGH)
Z = Clock Pulse (Low to High); ZZ = Clock Pulse (High to Low)
Features include assertion inputs and outputs on each of the four master/
slave counting flip-flops. Terminal count is generated internally in a manner
that allows synchronous loading at nearly the speed of the basic counter.
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10H016G
AWLYYWW
120
16
1
MC10H016P
AWLYYWWG
MARKING DIAGRAMS*
PDIP16
P SUFFIX
CASE 64808
16
1
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb-Fee Package
PLLC20
FN SUFFIX
CASE 77502
20
1
*For additional marking information, refer to
Application Note AND8002/D
.
For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
.
ORDERING INFORMATION
Device Package Shipping
MC10H016FNR2G PLCC20
(Pb-Free)
500/Tape & Reel
MC10H016PG PDIP16
(Pb-Free)
25 Units/Tube
MC10H016
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2
Table 2. MAXIMUM RATINGS
Symbol Characteristic Rating Unit
V
EE
Power Supply (V
CC
= 0) 8.0 to 0 Vdc
V
I
Input Voltage (V
CC
= 0) 0 to V
EE
Vdc
I
out
Output Current
Continuous
Surge
50
100
mA
T
A
Operating Temperature Range 0 to +75 °C
T
stg
Storage Temperature Range
Plastic
Ceramic
55 to +150
55 to +165
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. ELECTRICAL CHARACTERISTICS (V
EE
= 5.2 V ±5%) (Note 1)
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
I
E
Power Supply Current 126 115 126 mA
I
inH
Input Current High
All Except MR
Pin 12 MR
450
1190
265
700
265
700
mA
I
inL
Input Current Low 0.5 0.5 0.3
mA
V
OH
High Output Voltage 1.02 0.84 0.98 0.81 0.92 0.735 Vdc
V
OL
Low Output Voltage 1.95 1.63 1.95 1.63 1.95 1.60 Vdc
V
IH
High Input Voltage 1.17 0.84 1.13 0.81 1.07 0.735 Vdc
V
IL
Low Input Voltage 1.95 1.48 1.95 1.48 1.95 1.45 Vdc
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Ifpm is maintained.
Outputs are terminated through a 50 W resistor to 2.0 V.
Table 4. AC CHARACTERISTICS
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
t
pd
Propagation Delay
Clock to Q
Clock to TC
MR to Q
1.0
0.7
0.7
2.4
2.4
2.4
1.0
0.7
0.7
2.5
2.5
2.5
1.0
0.7
0.7
2.7
2.6
2.6
ns
t
set
Set-up Time
P
n
to Clock
CE or PE to Clock
2.0
2.5
2.0
2.5
2.0
2.5
ns
t
hold
Hold Time
Clock to P
n
Clock to CE or PE
1.0
0.5
1.0
0.5
1.0
0.5
ns
f
count
Counting Frequency 200 200 200 MHz
t
r
Rise Time 0.5 2.0 0.5 2.1 0.5 2.2 ns
t
f
Fall Time 0.5 2.0 0.5 2.1 0.5 2.2 ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
MC10H016
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3
PECE
C
Tc
MR
MSB
Q0Q3
P0P3
1/2 10H1091/2 10H1091/2 10H109
PECE
C
Tc
MR
Q0Q3
P0P3
PECE
C
Tc
MR
Q0Q3
P0P3
PECE
C
Tc
MR
Q0Q3
P0P3
PECE
C
Tc
MR
Q0Q3
P0P3
LSB
1/2 10H109
CLOCK
PN Counter 1 to 16
5
MC10H016 Cascaded for 5 Stage Presettable Counter
Max freq. is only OR gate delay below max when counting alone.
Note that this diagram is provided for understanding of logic operation only. It should not be used for evaluation of
propagation delays as many gate functions are achieved internally without incurring a full gate delay.
FO
TC
Q
Q
Q
Q
MASTER SLAVE
Q
Q
Q
MASTER SLAVE
Q
Q
Q
MASTER SLAVE
Q0 Q1 Q2 Q3
P0
P1 P2 P3
PE
MR
CE
CP
Figure 2. 4-Bit Binary Counter Logic Diagram

MC10H016FNR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Counter ICs 4-Bit Binary
Lifecycle:
New from this manufacturer.
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