Document Number: 72221
S10-0547-Rev. C, 08-Mar-10
www.vishay.com
7
Vishay Siliconix
Si5515DC
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Threshold Voltage
- 0.2
- 0.1
0.0
0.1
0.2
0.3
0.4
- 50 - 25 0 25 50 75 100 125 150
I
D
= 250 µA
Variance (V)V
GS(th)
T
J
- Temperature (°C)
Single Pulse Power
0
30
50
10
20
Power (W)
Time (s)
40
1 100 6001010
-1
10
-2
10
-4
10
-3
Safe Operating Area
100
1
0.1 1 10 100
0.01
10
T
A
= 25 °C
Single Pulse
DC
0.1
I
D(on)
Limited
*
DS(on)
Limited by R
BVDSS Limited
P(t) = 0.1
P(t) = 0.01
P(t) = 0.001
P(t) = 0.0001
V
DS
- Drain-to-Source Voltage (V)
*V
GS
> minimum V
GS
at which R
DS(on)
is specied
- Drain Current (A)
I
D
I
DM
Limited
P(t) = 1
P(t) = 10
Normalized Thermal Transient Impedance, Junction-to-Ambient
10
-3
10
-2
1 10 60010
-1
10
-4
100
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
1. Duty Cycle, D =
2. Per Unit Base = R
thJA
= 90 °C/W
3. T
JM
- T
A
= P
DM
Z
thJA
(t)
t
1
t
2
t
1
t
2
Notes:
4. Surface Mounted
P
DM
www.vishay.com
8
Document Number: 72221
S10-0547-Rev. C, 08-Mar-10
Vishay Siliconix
Si5515DC
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72221
.
Normalized Thermal Transient Impedance, Junction-to-Foot
10
-3
10
-2
11010
-1
10
-4
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
Package Information
Vishay Siliconix
Document Number: 71151
15-Jan-04
www.vishay.com
1
1206-8 ChipFETR
c
EE
1
e
D
A
6578
3421
4
L
5678
4321
4
S b
2X 0.10/0.13 R
Backside View
x
NOTES:
1. All dimensions are in millimeaters.
2. Mold gate burrs shall not exceed 0.13 mm per side.
3. Leadframe to molded body offset is horizontal and vertical shall not exceed
0.08 mm.
4. Dimensions exclusive of mold gate burrs.
5. No mold flash allowed on the top and bottom lead surface.
DETAIL X
C1
MILLIMETERS INCHES
Dim Min Nom Max Min Nom Max
A
1.00 1.10 0.039 0.043
b
0.25 0.30 0.35 0.010 0.012 0.014
c
0.1 0.15 0.20 0.004 0.006 0.008
c1
0 0.038 0 0.0015
D
2.95 3.05 3.10 0.116 0.120 0.122
E
1.825 1.90 1.975 0.072 0.075 0.078
E
1
1.55 1.65 1.70 0.061 0.065 0.067
e
0.65 BSC 0.0256 BSC
L
0.28 0.42 0.011 0.017
S
0.55 BSC 0.022 BSC
5_Nom 5_Nom
ECN: C-03528—Rev. F, 19-Jan-04
DWG: 5547

SI5515DC-T1-E3

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
MOSFET RECOMMENDED ALT 781-SI5515CDC-T1-GE3
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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