DAC8408
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REV. A
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs. Logic Level
Analog Crosstalk vs. Frequency
DAC8408
–7–
REV. A
Timing Diagram
AC FEEDTHROUGH ERROR
This is the error caused by capacitance coupling from V
REF
to
the DAC output with all switches off.
SETTLING TIME
Settling Time is the time required for the output function of the
DAC to settle to within 1/2 LSB for a given digital input signal.
PROPAGATION DELAY
This is a measure of the internal delays of the DAC. It is defined
as the time from a digital input change to the analog output cur-
rent reaching 90% of its final value.
CHANNEL-TO-CHANNEL ISOLATION
This is the portion of input signal that appears at the output of a
DAC from another DAC’s reference input. It is expressed as a
ratio in dB.
DIGITAL CROSSTALK
Digital Crosstalk is the glitch energy transferred to the output of
one DAC due to a change in digital input code from other
DACs. It is specified in nVs.
PARAMETER DEFINITIONS
RESOLUTION
Resolution is the number of states (2
n
) that the full-scale range
(FSR) of a DAC is divided (or resolved) into.
NONLINEARITY
Nonlinearity (Relative Accuracy) is a measure of the maximum
deviation from a straight line passing through the end-points of
the DAC transfer function. It is measured after adjusting for
ideal zero and full-scale and is expressed in LSB, %, or ppm of
full-scale range.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the worst case deviation of any adja-
cent analog outputs from the ideal 1 LSB step size. A specified
differential nonlinearity of ±1 LSB maximum over the operating
temperature range ensures monotonicity.
GAIN ERROR
Gain Error (full-scale error) is a measure of the output error be-
tween the ideal and actual DAC output. The ideal full-scale
output is V
REF
–1 LSB.
OUTPUT CAPACITANCE
Output Capacitance is that capacitance between I
OUT 1A
, I
OUT 1B
,
I
OUT 1C
, or I
OUT 1D
and AGND.
DAC8408
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REV. A
CIRCUIT INFORMATION
The DAC8408 combines four identical 8-bit CMOS DACs
onto a single monolithic chip. Each DAC has its own reference
input, feedback resistor, and on-board data latches. It also fea-
tures a read/write function that serves as an accessible memory
location for digital-input data words. The DAC’s three-state
readback drivers place the data word back onto the data bus.
D/A CONVERTER SECTION
Each DAC contains a highly stable, silicon-chromium, thin-film,
R-2R resistor ladder network and eight pairs of current steering
switches. These switches are in series with each ladder resistor
and are single-pole, double-throw NMOS transistors; the gates
of these transistors are controlled by CMOS inverters. Figure 1
shows a simplified circuit of the R-2R resistor ladder section,
and Figure 2 shows an approximate equivalent switch circuit.
The current through each resistor leg is switched between I
OUT 1
and I
OUT 2
. This maintains a constant current in each leg, re-
gardless of the digital input logic states.
Each transistor switch has a finite “ON” resistance that can in-
troduce errors to the DAC’s specified performance. These resis-
tances must be accounted for by making the voltage drop across
each transistor equal to each other. This is done by binarily-
scaling the transistor’s “ON” resistance from the most signifi-
cant bit (MSB) to the least significant bit (LSB). With 10 volts
applied at the reference input, the current through the MSB
switch is 0.5 mA, the next bit is 0.25 mA, etc.; this maintains a
constant 10 mV drop across each switch and the converter’s ac-
curacy is maintained. It also results in a constant resistance ap-
pearing at the DAC’s reference input terminal; this allows the
DAC to be driven by a voltage or current source, ac or dc of
positive or negative polarity.
Shown in Figure 3 is an equivalent output circuit for DAC A.
The circuit is shown with all digital inputs high. The leakage
current source is the combination of surface and junction leak-
ages to the substrate. The 1/256 current source represents the
constant 1-bit current drain through the ladder terminating re-
sistor. The situation is reversed with all digital inputs low, as
shown in Figure 4. The output capacitance is code dependent,
and therefore, is modulated between the low and high values.
Figure 1. Simplified D/A Circuit of DAC8408
Figure 2. N-Channel Current Steering Switch
Figure 3. Equivalent DAC Circuit (AII Digital Inputs HIGH)

DAC8408FPC

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
IC DAC 8BIT QUAD W/MEMORY 28PLCC
Lifecycle:
New from this manufacturer.
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