LTC3625/LTC3625-1
7
3625f
pin FuncTions
V
MID
(Pin 10): Midpoint of Two Series Supercapacitors.
The pin voltage is monitored and used, along with V
OUT
,
to enable or shut down the buck and boost converters
during charging to achieve voltage balancing of the top
and bottom supercapacitors.
V
OUT
(Pin 11): Output Voltage Pin. Connect V
OUT
to the
positive terminal of the top supercapacitor. The pin volt-
age is monitored and used, along with V
MID
, to enable or
shut down the buck and boost converters during charg-
ing to achieve voltage balancing of the top and bottom
supercapacitors.
SW2 (Pin 12): Switch Pin for the Boost Regulator. External
inductor connects between the SW2 pin and V
MID
. If CTL
is logic high, then SW2 must be connected to SW1.
GND (Exposed Pad Pin 13): Ground. The exposed pad
must be connected to a continuous ground plane on
the printed circuit board directly under the LTC3625/
L
TC3625
-1 for electrical contact and to achieve rated
thermal performance.
block DiagraM
8
+
PFO
7
PFI
1.20V
4.44V/4.90V (LTC3625)
3.7V/4.16V (LTC3625-1)
9
+
PGOOD
4
V
SEL
10
V
MID
THRESHOLD
DETECTOR
5
EN
3
CTL
V
MID_GOOD
SD_BUCK
6
13
2
PROG
MASTER
LOGIC
OVERTEMPERATURE
SHUTDOWN
1.2V
+
+
GND
SW1
V
IN
B
3625 BD
A
D
SD_BOOST
REF/R PROGRAMMED
AVG OUTPUT CURRENT
SYNCHRONOUS
BUCK CURRENT
REGULATOR
BUCK REGULATOR
BOOST REGULATOR
1
11
SW2
V
OUT
C
2A AVG
INPUT CURRENT
SYNCHRONOUS
BOOST CURRENT
REGULATOR
12
V
MAXER
V
IN
V
OUT
LTC3625/LTC3625-1
8
3625f
operaTion
The LTC3625/LTC3625-1 are dual cell supercapacitor char-
gers. Their unique topology charges two series connected
capacitors to a fixed output voltage with programmable
charging current without overvoltaging either of the cells
even if they are severely mismatched. No balancing
resistors are required. The LTC3625/LTC3625-1 include an
internal buck converter between V
IN
and V
MID
to regulate
the voltage on C
BOT
(across the bottom capacitor) as well
as an internal boost converter between V
MID
and V
OUT
to
regulate the voltage on C
TOP
(across the top capacitor). The
output current of the buck converter is user-programmed
via the PROG pin and the input current of the boost con-
verter is set at 2A (typical).
Table 1 indicates the various functions of the LTC3625/
LTC3625-1 that can be digitally controlled.
Table 1. Digital Input Functions
PIN VALUE FUNCTION
CTL* 0 Part runs in 2-inductor application
1 Part runs in 1-inductor application
V
SEL
0 4.8V/4.0V sleep threshold
1 5.3V/4.5V sleep threshold
EN 0 Part shuts down, V
OUT
becomes high
impedance
1 Part enables and regulates the output
*CTL pin must be hard tied to either V
IN
or GND.
V
IN
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors V
IN
and
keeps the LTC3625/LTC3625-1 disabled until V
IN
rises
above 2.90V/2.63V (typical) if V
SEL
is high or 2.63V/2.63V
(typical) if V
SEL
is low. Hysteresis on the UVLO turns off
the LTC3625/LTC3625-1 if V
IN
drops by approximately
100mV below the UVLO rising threshold. When in UVLO,
only current needed to detect a valid input will be drawn
from V
IN
and V
OUT
.
Buck Converter
The buck converter regulates a user-programmed average
output current given by:
I h
V
R
BUCK PROG
PROG
=
.1 2
where h
PROG
= 118,000 (typical).
The buck converter regulates the current hysteretically by
switching on the buck PMOS until a peak current limit is
reached and then turning on the buck NMOS until a valley
current limit is reached. In the single inductor application
the boost NMOS is used in conjunction with the buck
NMOS to increase efficiency at high currents. The forward
current limit is set to 1.1 I
BUCK
(typical) and the valley
current limit is set to 0.9 I
BUCK
(typical). Because of this
method of regulation, overcurrent limit and reverse-current
limit protection is automatically provided. The LTC3625/
LTC3625-1 will continue to regulate its programmed cur-
rent even into a grounded output.
In fault conditions where the PROG pin is shorted to ground,
or R
PROG
is conductive enough to program I
BUCK
to operate
outside of specification, the current out of the PROG pin
will be clamped to 22.5µA (typical) and I
BUCK
will be set to
2.65A (typical). If input current limit is not a concern, the
PROG pin may be grounded to minimize charge times.
Boost Converter
The boost converter regulates a fixed average input current
of 2A (typical). The current is regulated hysteretically by
switching on the boost NMOS until the peak current limit of
2.12A (typical) is reached, and turning on the boost PMOS
until the valley current limit of 1.88A (typical) is reached.
In the single inductor application the buck NMOS is used
in conjunction with the boost NMOS to increase efficiency.
Because of this method of regulation, overcurrent limit and
reverse-current limit protection is automatically provided.
In normal operation V
OUT
will increase with V
MID
so V
OUT
should never be below V
MID
. In the case where there is a
reverse voltage on C
TOP
due to a faulty precondition or a
large load on the output, the boost converter will operate
in trickle charge mode. In this mode the boost PMOS
gate will remain high and instead allow the SW2 node to
increase until SW2 V
MAX
+ 1V to allow a higher reverse
voltage across the inductor, and the current is ramped down
to 0mA. This will result in a less efficient charge delivery
through the PMOS. To keep dissipation low, I
PEAK
is limited
to 200mA (typical). In this mode the discharge phase is
terminated if it lasts longer than 6.5µs (typical).
The boost converter is disabled if V
MID
falls below the
V
MID(GOOD)
hysteresis threshold of 1.2V (typical).
LTC3625/LTC3625-1
9
3625f
operaTion
Single Inductor Operation
With the CTL pin tied to V
IN
the LTC3625/LTC3625-1 will
operate in single inductor mode. In this mode the same
inductor serves in the power path for both the buck and
the boost converters. Thus, the buck converter and boost
converter will never run simultaneously.
Under certain conditions with a single inductor, a small
amount of current can flow from the supercapacitors to V
IN
when the boost charger is active. A 25mA load is required
on V
IN
to prevent the V
IN
supply from being pumped to
a higher voltage while the boost is active. This minimum
load is not needed in the two inductor application and it
is also not needed when the charger is disabled.
A typical charge cycle for a fully discharged capacitor stack
will proceed as follows:
1.
The
buck converter will turn on and regulate its output
current ramping hysteretically between 1.1 I
BUCK
and
0.9 I
BUCK
until the V
MID(GOOD)
threshold is met (1.35V
typical).
2. Once
the V
MID(GOOD)
threshold is reached, the boost
converter will turn on and regulate its input current
ramping hysteretically between 2.12A and 1.88A until
V
MID
falls below the V
MID(GOOD)
hysteresis threshold
(1.2V typical).
3. Phases
1 and 2 will alternate until V
OUT
is approximately
2.4V. When V
TOP
(equal to V
OUT
V
MID
) is approximately
50mV > V
MID
, the boost regulator will turn off and the
buck regulator will turn on. Likewise, when V
MID
is
approximately 50mV > V
TOP
, the boost regulator will
turn on and the buck regulator will turn off.
4. Phase
3 will continue until V
OUT
has reached its pro-
grammed output voltage. Once this happens, the part
will enter sleep mode and only minimal power will be
consumed (see the Electrical Characteristics table).
5.
If the supercapacitors’ self discharge or an external load
cause the output to drop by more than 135mV (typical),
then the LTC3625/LTC3625-1 will exit sleep mode and
begin charging the appropriate supercapacitor.
In all cases whenever either of the converters is shut
down, it will switch to its appropriate discharge phase
(NMOS on for the buck and PMOS on for the boost) until
the inductor current reaches 0mA. This optimizes charge
delivery to the output capacitors.
Charge time is dependant on the programmed buck output
current as well as the value of the supercapacitors being
charged. For estimating charge profiles in the single induc-
tor application, see the Typical Performance Characteristics
graph Charge Time vs R
PROG
.
The effective average V
OUT
referred charge current can
be approximated as:
I I
A
I A
CHARGE BUCK BOOST
BUCK
+
0 5
2
2
. ε
where ε
BOOST
is the boost converter efficiency, which is
typically about 85% (see the Typical Performance Char-
acteristics graph Boost Efficiency vs V
TOP
).
Seen another way, this is the maximum steady-state load
the part can support without losing V
OUT
regulation.
Dual Inductor Operation
With the CTL pin tied to GND, the LTC3625/LTC3625-1
will operate in dual inductor mode. In this mode two
inductors will serve as the power path for the buck and
the boost converters. This will allow both the buck and
the boost converter to run simultaneously. As a result, the
total charge time will be greatly reduced at the cost of an
additional board component.
A typical charge cycle for a fully discharged capacitor stack
will proceed as follows:
1. The buck converter will turn on and regulate its output
current ramping hysteretically between 1.1 I
BUCK
and 0.9 I
BUCK
until the V
MID(GOOD)
threshold is met
(1.35V typical).
2. Once the V
MID(GOOD)
threshold is reached, the boost
converter will turn on and regulate its input current
ramping hysteretically between 2.12A and 1.88A. The
buck converter will continue to run at the same time. In
some cases (I
BUCK
~ <1A) the boost converters input
current will exceed the current delivered to C
BOT
; even
though the buck converter is running, charge will be
removed and V
MID
may decrease. Thus, if V
MID
falls
below the V
MID(GOOD)
hysteresis threshold, the boost

LTC3625IDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 1A High Efficiency 2-Cell SuperCap Charger with Programmable Charge Current
Lifecycle:
New from this manufacturer.
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