3
dc2153af
DEMO MANUAL DC2153A
operation
Demo circuit 2153A is a high linearity, fixed gain amplifier.
It is designed for ease of use. The LTC6430-15 is internally
matched to 100Ω differential source and load impedances
from 20MHz to 1400MHz. Due to the unpopularity of
100Ω differential test equipment, transformers have been
added to convert these impedances to single-ended 50Ω.
The frequency range of the circuit is limited by the balun
transformers. Hence, this demo board optimizes the ampli
-
fier per
formance over the frequency range from 300MHz
to
1700MHz. Figure 2 shows the two port DC2153A’s
S-parameters.
The demo circuit’s schematic shows a minimum require
-
ment of passive
support components. Due to the imbalance
from the input and output transformers, the harmonic
distortion performance is slightly degraded. The shunt
capacitors (C8, C9, C25 and C6) help to balance the input
and output signals.
The input and output DC blocking capacitors (C5, C7, C10
and C12) are required because this device is internally
DC-biased for optimal operation. The frequency appropri
-
ate RF
chokes (L2 and L3) and the decoupling capacitors
(C2,
C3, C15 and C16) provide the proper DC bias to the
RF ±OUT ports. A single 5V supply is required for the V
CC
pins on the device.
L1, L4, C6 and C13 are optional components. They are for
additional matching when further optimization to a lower
or wider frequency range applications is required.
A pair of stability networks have been added. They consist
of a 62pF capacitor (C4 and C11) and 348Ω resistor (R1
and R5) in parallel at the LTC6430-15 input network to
ensure low frequency stability.
The T_DIODE pin (Turret E1) can be forward biased to
ground with 1mA of current. The measured voltage will
be an indicator of the chip junction temperature (T
J
).
There is an optional circuit at the upper section of the
demo board. This extra circuit can be used to calibrate for
the insertion loss of the demo board’s input and output
components.
Please note that a number of DNC pins are connected on
the demo board. These connections are not necessary for
normal operation, however, failure to float these pins may
impair the operation of the device.
Table 2 shows the function of each input and output on
the board.
Table 2. DC2153A Board I/O Descriptions
CONNECTOR FUNCTION
J1 (IN) Single-ended input. Impedance matched to 50Ω.
Drive from a 50Ω network analyzer or signal source.
J4 (OUT) Single-ended output. Impedance matched to 50Ω.
Drives a 50Ω network analyzer or spectrum analyzer.
E1 (T_DIODE) The measured voltage will be an indicator of the chip
junction temperature.
E2 (V
CC
) Positive supply voltage source.
E3 (GND) Supply ground.
