LTC3537
13
3537fd
OPERATION
Burst Mode operation is inhibited during start-up and soft-
start and until V
OUTB
is at least 0.24V greater than V
INB
.
The LTC3537 will operate at a continuous PWM frequency
of 2.2MHz by connecting MODE to GND. At very light loads,
the LTC3537 will exhibit pulse-skip operation.
Single Cell to 5V Step-Up Applications
Due to the high inductor current slew rate in applications
boosting to 5V from a single-cell (alkaline, NiCd or NiMH),
the LTC3537 may not enter Burst Mode operation for input
voltages less than 1.2V. Refer to the Typical Performance
Characteristics curves for the Burst Mode thresholds for
different input and output voltages.
LDO REGULATOR OPERATION
The LTC3537 includes an independent 100mA low dropout
linear regulator (LDO). The V
INL
pin can be connected to
an independent source or connected to the output of the
boost regulator. An input capacitor on V
INL
is optional, but
it will help to improve transient responses. The LDO will
operate with a V
INL
down to 1.5V, but specifi cations are
guaranteed with V
INL
from 1.8V to 5.5V.
Shutdown
Shutdown of the LDO is accomplished by pulling ENLDO
below 0.3V and enabled by pulling ENLDO above 0.8V. Note
that ENLDO can be driven above V
INL
or V
OLDO
, as long
as it is limited to less than the absolute maximum rating.
In the event that the LDO output voltage is held above the
input voltage, the LDO goes in to shutdown until the output
drops back below the input voltage. In shutdown the LDO
will block reverse current from V
OLDO
to V
INL
.
LDO Error Amplifi er
The non-inverting input of the transconductance error
amplifi er is internally connected to a 0.6V reference and
the inverting input is connected to FBL. The control loop
compensation is provided internally. An external resistive
voltage divider from V
OLDO
to ground programs the output
voltage via FBL from 0.6V to 5V.
V
OLDO
= 0.6V 1+
R4
R3
LDO Current Sensing and Limiting
Current is sensed across an internal resistor. The guaran-
teed minimum output current is 100mA.
LOW-BATTERY INDICATOR
The LTC3537 includes a low-battery comparator. The non-
inverting input of the comparator is internally connected
to a 0.58V reference and the inverting input is connected
to LBI. An external resistive voltage divider from V
INL
to
ground programs the threshold voltage. When the volt-
age at LBI drops below 0.58V, the open-drain N-channel
MOSFET will turn on. The N-channel MOSFET device is
forced off when both the step-up converter and LDO are
in shutdown.
V
LBI
= 0.58V 1+
R6
R5
BOOST POWER-GOOD INDICATOR
The LTC3537 includes a power-good comparator for the
step-up converter. The non-inverting input of the compara-
tor is internally connected to a 1.08V reference and the
inverting input is connected to the FBB pin. The open-drain
MOSFET on PGDB will turn off when the output voltage
is typically within 6% of the programmed output voltage.
Output sequencing can be achieved by connecting PGDB to
the LDO enable pin (ENLDO). This would allow the user to
keep the LDO off until the step-up converter is regulating.
The N-channel MOSFET is forced on in shutdown.
LDO POWER-GOOD INDICATOR
The LTC3537 includes a power-good comparator for the
LDO. The non-inverting input of the comparator is internally
connected to a 540mV reference and the inverting input is
connected to the FBL pin. The open-drain MOSFET on the
PGDL pin will turn off when the output voltage is typically
within 4% of the programmed output voltage.
Output sequencing can be achieved by connecting PGDL to
the boost enable pin (ENBST). This would allow the user to
keep the step-up converter off until the LDO is regulating.
The N-channel MOSFET is forced on in shutdown.
LTC3537
14
3537fd
APPLICATIONS INFORMATION
V
INB
> V
OUTB
OPERATION
The LTC3537 step-up converter will maintain voltage regu-
lation even when the input voltage is above the desired
output voltage. Note that the effi ciency is much lower in this
mode, and the maximum output current capability will be
less. Refer to the Typical Performance Characteristics.
STEP-UP SHORT-CIRCUIT PROTECTION
The LTC3537 output disconnect feature provides output
short circuit protection. To reduce power dissipation under
short-circuit conditions, the peak switch current limit is
reduced to 400mA (typical).
SCHOTTKY DIODE
Although it is not required, adding a Schottky diode from
SW to V
OUTB
will improve effi ciency by about 4%. Note
that this defeats the output disconnect and short-circuit
protection features.
PCB LAYOUT GUIDELINES
The high speed operation of the LTC3537 demands careful
attention to board layout. A careless layout will result in
reduced performance. Figure 1 shows the recommended
component placement. A large ground pin copper area
will help to lower the die temperature. A multilayer board
with a separate ground plane is ideal, but not absolutely
necessary.
COMPONENT SELECTION
Inductor Selection
The LTC3537 can utilize small surface mount chip induc-
tors due to its fast 2.2MHz switching frequency. Inductor
values between 1µH and 4.7µH are suitable for most ap-
plications. Larger values of inductance will allow slightly
greater output current capability (and lower the Burst
Mode threshold) by reducing the inductor ripple current.
Increasing the inductance above 10µH will increase size
while providing little improvement in output current capa-
bility. The minimum inductance value is given by:
L >
V
INB(MIN)
V
OUTB(MAX)
V
INB(MIN)
()
2.2 RippleV
OUTB(MAX)
where:
Ripple = Allowable inductor current ripple (amps
peak-peak)
V
INB(MIN)
= Minimum converter input voltage
V
OUTB(MAX)
= Maximum output voltage
The inductor current ripple is typically set for 20% to
40% of the maximum inductor current. High frequency
ferrite core inductor materials reduce frequency dependent
power losses compared to cheaper powdered iron types,
improving effi ciency. The inductor should have low ESR
(series resistance of the windings) to reduce the I
2
R power
losses, and must be able to support the peak inductor
current without saturating. Molded chokes and some chip
inductors usually do not have enough core area to support
the peak inductor currents of 750mA seen on the LTC3537.
To minimize radiated noise, use a shielded inductor. See
Table 1 for suggested components and suppliers.
Figure 1
3537 F01
5678
16 15 14 13
LBO SW
V
OUTB
MODE
V
INL
V
OLDO
LBI
SGND
V
INB
FBL
FBB
1
2
3
4
12
11
10
9
+
PGDB ENBST PGDL ENLDO
MULTIPLE VIAS
TO INNER GROUND LAYERS
LTC3537
15
3537fd
APPLICATIONS INFORMATION
Table 1: Recommended Inductors
VENDOR PART/STYLE
Coilcraft
(847) 639-6400
www.coilcraft.com
LPO4815
LPS4012, LPS4018
MSS5131
MSS4020
MOS6020
ME3220
DS1605, DO1608
Coiltronics
www.cooperet.com
SD10, SD12, SD14, SD18,
SD20,
SD52, SD3114, SD3118
FDK
(408) 432-8331
www.fdk.com
MIP3226D4R7M,
MIP3226D3R3M
MIPF2520D4R7
MIPWT3226D3R0
Murata
(714) 852-2001
www.murata.com
LQH43C
LQH32C (-53 series)
301015
Sumida
(847) 956-0666
www.sumida.com
CDRH5D18
CDRH2D14
CDRH3D16
CDRH3D11
CR43
CMD4D06-4R7MC
CMD4D06-3R3MC
Taiyo-Yuden
www.t-yuden.com
NP03SB
NR3015T
NR3012T
TDK
(847) 803-6100
www.component.tdk.com
VLP
VLF, VLCF
Toko
(408) 432-8282
www.tokoam.com
D412C
D518LC
D52LC
D62LCB
Wurth
(201) 785-8800
www.we-online.com
WE-TPC Type S, M
Output and Input Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints.
A 4.7µF to 10µF output capacitor is suffi cient for most
boost applications. Larger values up to 22µF may be used
to obtain extremely low output voltage ripple and improve
transient response. X5R and X7R dielectric materials are
preferred for their ability to maintain capacitance over
wide voltage and temperature ranges. Y5V types should
not be used.
The internal loop compensation of the LTC3537 is designed
to be stable with a minimum output capacitor value of
4.7µF when in PWM mode on the boost regulator and
1µF or greater on the LDO regulator. Although ceramic
capacitors are recommended, low ESR tantalum capaci-
tors may be used as well. For the LDO, see Figures 2 and
3 for output capacitor value and ESR requirements. To
reduce Burst Mode boost output voltage ripple, 10µF is
recommended.
Figure 2. LDO Regulator Output Capacitance vs ESR
Figure 3. LDO Regulator Minimum Output Capacitance
vs V
INL
/V
OLDO
CAPACITANCE (µF)
ESR ()
3537 F02
1.6
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.0
1 10 100
REGION OF
OPERATION
V
INL
/V
OLDO
1
MINIMUM OUTPUT CAPACITANCE (µF)
5.0
4.5
3.5
3.0
2.5
2.0
1.0
4.0
1.5
0.5
0.0
436
3537 F03
725

LTC3537EUD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 600mA (I sw) Synchronous Boost Converter and 100mA LDO in 3mmmm x 3mm QFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet