DC1151A-D

DC1151A-D
Mfr. #:
DC1151A-D
Manufacturer:
Analog Devices Inc.
Description:
Data Conversion IC Development Tools LTC2274CUJ - 16-bit, 105Msps Serial ADC,
Lifecycle:
New from this manufacturer.
Datasheet:
DC1151A-D Datasheet
Delivery:
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HTML Datasheet:
DC1151A-D DatasheetDC1151A-D Datasheet (P4-P6)DC1151A-D Datasheet (P7)
ECAD Model:
More Information:
DC1151A-D more Information DC1151A-D Product Details
Product Attribute
Attribute Value
Manufacturer:
Analog Devices Inc.
Product Category:
Data Conversion IC Development Tools
RoHS:
Y
Product:
Demonstration Boards
Type:
ADC
Tool Is For Evaluation Of:
LTC2274
Operating Supply Voltage:
3.135 V to 3.465 V
Series:
LTC2274
Brand:
Analog Devices
Product Type:
Data Conversion IC Development Tools
Factory Pack Quantity:
1
Subcategory:
Development Tools
Tags
DC1151, DC115, DC11, DC1
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
LTC2274 ADC Demonstration Circuit 105MSPS Pscope IDE
***ponent Distributors Inc.
LTC2274CUJ Evaluation Kit (Fin= 70-140MHz)
***hardson RFPD
LINEAR ICS - EVALUATION BOARD
***i-Key
EVAL BOARD FOR LTC2274
***ment14 APAC
DEMO BOARD, ADC
***ark
Demo Board, Adc; Silicon Manufacturer:linear Technology; Silicon Core Number:ltc2274; No. Of Bits:16Bit; Sample Rate:105Msps; Kit Application Type:data Converter; Application Sub Type:adc; Kit Contents:demo Board Ltc2274 Rohs Compliant: Na
***log Devices
The LTC2274 is a 105Msps, 16-bit A/D converter with a high speed serial interface. It is designed for digitizing high frequency, wide dynamic range signals with an input bandwidth of 700MHz. The input range of the ADC can be optimized using the PGA front end. The output data is serialized according to the JEDEC Serial Interface for Data Converters specification (JESD204). The LTC2274 is perfect for demanding applications where it is desirable to isolate the sensitive analog circuits from the noisy digital logic. The AC performance includes a 77.7dB Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low internal jitter of 80fs RMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4.5LSB INL and ±1LSB DNL (no missing codes) over temperature. The encode clock inputs, ENC+ and ENC–, may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. A clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE
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Availability
Stock:
Available
On Order:
1986
Enter Quantity:
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