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IS61C6416AL-12TLI-TR
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P17
10
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
06/08/05
ISSI
®
IS61C6416AL
IS64C6416AL
IS62C6416AL
IS65C6416AL
WRITE CYCLE NO. 2
(
OE
is HIGH During Write Cycle)
(1,2)
WRITE CYCLE NO. 3
(
OE
is LOW During Write Cycle)
(1)
Notes:
1.
The internal write time is defined by the overlap of
CE
LOW and
WE
LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falli
ng
edge of the signal that terminates the Write.
2.
I/O will assume the High-Z state if
OE
≥
V
IH
.
DATA UNDEFINED
LOW
t
WC
VALID ADDRESS
t
PWE1
t
AW
t
HA
HIGH-Z
t
PBW
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB
,
LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
UB_CEWR2.eps
DATA UNDEFINED
t
WC
VALID ADDRESS
LOW
LOW
t
PWE2
t
AW
t
HA
HIGH-Z
t
PBW
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB
,
LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
UB_CEWR3.eps
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
11
Rev. B
06/08/05
ISSI
®
IS61C6416AL
IS64C6416AL
IS62C6416AL
IS65C6416AL
WRITE CYCLE NO. 4
(
UB
/
LB
Back to Back Write)
DATA UNDEFINED
t
WC
ADDRESS 1
ADDRESS 2
t
WC
HIGH-Z
t
PBW
WORD 1
LOW
WORD 2
UB_CEWR4.eps
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB
,
LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
t
PBW
DATA
IN
VALID
t
SD
t
HD
t
SA
t
HA
t
HA
12
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
06/08/05
ISSI
®
IS61C6416AL
IS64C6416AL
IS62C6416AL
IS65C6416AL
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol
Parameter
Test Condition
Min.
Max.
Unit
V
DR
V
DD
for Data Retention
See Data
Retention Waveform
2
.0
5
.5
V
I
DR
Data Retention Current
V
DD
= 2.0V,
CE
≥
V
DD
– 0.2V
Com.
—
9
0
µ
A
V
IN
≥
V
DD
– 0.2V, or V
IN
≤
V
SS
+ 0.2V
Ind.
—
1
00
Auto.
—
12
5
typ.
(1)
50
t
SDR
Data Retention Setup Time
See Data Retention Waveform
0
—
ns
t
RDR
Recovery Time
See Data Retention Waveform
t
RC
—n
s
Note:
1. Typical Values are measured at V
DD
= 5V, T
A
= 25
o
C and not 100% tested.
DATA RETENTION WAVEFORM (
CE
CE
CE
CE
CE
Controlled)
VDD
CE
≥
VDD
- 0.2V
t
SDR
t
RDR
V
DR
CE
GND
4.5V
2.2V
Data Retention Mode
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P17
IS61C6416AL-12TLI-TR
Mfr. #:
Buy IS61C6416AL-12TLI-TR
Manufacturer:
ISSI
Description:
SRAM 1Mb 64Kx16 12ns 5v Async SRAM
Lifecycle:
New from this manufacturer.
Delivery:
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