74LVT273_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 10 September 2008 7 of 17
NXP Semiconductors
74LVT273
3.3 V octal D-type flip-flop
[1] All typical values are measured at V
CC
= 3.3 V (unless stated otherwise) and T
amb
=25°C.
[2] For valid test results data must not be loaded into the flip-flops (or latches) after applying the power.
[3] Unused pins at V
CC
or GND.
[4] This is the bus hold overdrive current required to force the input to the opposite logic state.
[5] Increase in supply current for each input at the specified voltage level other than V
CC
or GND
10. Dynamic characteristics
I
CC
supply current V
CC
= 3.6 V; V
I
=V
CC
or GND; I
O
=0A
outputs HIGH - 0.13 0.19 mA
outputs LOW - 3 12 mA
∆I
CC
additional supply current per input pin; V
CC
= 3.0 V to 3.6 V;
one input = V
CC
− 0.6 V
other inputs at V
CC
or GND
[5]
- 0.1 0.2 mA
C
I
input capacitance V
I
= 0 V or 3.0 V - 4 - pF
Table 6. Static characteristics
…continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions −40 °C to +85 °C Unit
Min Typ
[1]
Max
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter Conditions −40 °C to +85 °C Unit
Min Typ
[1]
Max
t
PLH
LOW to HIGH propagation delay CP to Qn; Figure 6
V
CC
= 2.7 V - - 6.3 ns
V
CC
= 3.3 V ± 0.3 V 1.7 3.5 5.5 ns
t
PHL
HIGH to LOW propagation delay CP to Qn; Figure 6
V
CC
= 2.7 V - - 5.9 ns
V
CC
= 3.3 V ± 0.3 V 1.9 3.5 5.5 ns
MR to Qn; see Figure 7
V
CC
= 2.7 V - - 6.2 ns
V
CC
= 3.3 V ± 0.3 V 1.3 3.2 6.2 ns
t
su
set-up time Dn to CP HIGH; see Figure 7
[2]
V
CC
= 2.7 V 2.7 - - ns
V
CC
= 3.3 V ± 0.3 V 2.3 1.0 - ns
Dn to CP LOW; see
Figure 7
V
CC
= 2.7 V 2.7 - - ns
V
CC
= 3.3 V ± 0.3 V 2.3 1.0 - ns
t
h
hold time Dn to CP HIGH; see Figure 8
[3]
V
CC
= 2.7 V 0 - - ns
V
CC
= 3.3 V ± 0.3 V 0 −0.6 - ns
Dn to CP LOW; see
Figure 8
V
CC
= 2.7 V 0 - - ns
V
CC
= 3.3 V ± 0.3 V 0 −0.6 - ns
