MC74HC161A, MC74HC163A
http://onsemi.com
5
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns)
Symbol
Parameter Figure
V
CC
V
Guaranteed Limit
Unit
– 55 to 25_C v 85_C v 125_C
f
max
Maximum Clock Frequency
(50% Duty Cycle)
(Note 6)
4, 10 2.0
3.0
4.5
6.0
6
15
30
35
5
12
24
28
4
10
20
24
MHz
t
PLH
Maximum Propagation Delay,
Clock to Q
4, 10 2.0
3.0
4.5
6.0
120
75
20
16
160
120
23
20
200
150
28
22
ns
t
PHL
4, 10 2.0
3.0
4.5
6.0
145
100
22
18
185
135
25
20
220
150
30
23
ns
t
PHL
Maximum Propagation Delay,
Reset to Q (HC161A Only)
5, 10 2.0
3.0
4.5
6.0
145
100
20
17
185
135
22
19
220
150
25
21
ns
t
PLH
Maximum Propagation Delay,
Enable T to Ripple Carry Out
6, 10 2.0
3.0
4.5
6.0
110
60
16
14
150
115
18
15
190
140
20
17
ns
t
PHL
6, 10 2.0
3.0
4.5
6.0
135
100
18
15
175
130
20
16
210
160
22
20
ns
t
PLH
Maximum Propagation Delay,
Clock to Ripple Carry Out
4, 10 2.0
3.0
4.5
6.0
120
75
22
18
160
135
27
22
200
150
30
25
ns
t
PHL
4, 10 2.0
3.0
4.5
6.0
145
100
22
20
185
135
28
24
220
150
35
28
ns
t
PHL
Maximum Propagation Delay,
Reset to Ripple Carry Out
(HC161A Only)
5, 10 2.0
3.0
4.5
6.0
155
120
22
18
190
140
26
22
230
155
30
25
ns
t
TLH
,
t
THL
Maximum Output Transition Time,
Any Output
5, 10 2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
C
in
Maximum Input Capacitance 4, 10 − 10 10 10 pF
6. Applies to noncascaded/nonsynchronous clocked configurations only with synchronously cascaded counters. (1) Clock to Ripple Carry Out
propagation delays. (2) Enable T or Enable P to Clock setup times and (3) Clock to Enable T or Enable P hold times determine f
max
. However,
if Ripple Carry out of each stage is tied to the Clock of the next stage (nonsynchronously clocked) the f
max
in the table above is applicable.
See Applications information in this data sheet.
C
PD
Power Dissipation Capacitance (Per Gate) (Note 7)
Typical @ 25°C, V
CC
= 5.0 V
pF
45
7. Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
.
