Operation description SRK2001
16/20 DocID027367 Rev 4
duty cycle has increased above the values in Table 8: the user can select the desired value
(internally stored during the startup phase) by a proper choice of the R
PG
resistor.
5.8 Layout guidelines
The GND pin is the return of the bias current of the device and the return for gate drive
currents: it should be routed to the common point where the source terminals of both
synchronous rectifier MOSFETs are connected. When laying out the PCB, care must be
taken in keeping the source terminals of both SR MOSFETs as close to one another as
possible and routing the trace that goes to GND separately from the load current return
path. This trace should be as short as possible and be as close to the physical source
terminals as possible. Doing the layout as more geometrically symmetrical as possible will
help make the circuit operation as much electrically symmetrical as possible.
Also drain-source voltage sensing should be done as physically close to the drain and
source terminals as possible in order to minimize the stray inductance involved by the load
current path that is in the drain-to-source voltage sensing circuit.
The usage of bypass capacitors between V
CC
and GND is recommended. They should be
the low ESR, low ESL type and located as close to the IC pins as possible. Sometimes,
a series resistor (in the tens ) between the converter's output voltage and the V
CC
pin,
forming an RC filter along with the bypass capacitor, is useful to get a cleaner V
CC
voltage.
Table 8. Lookup table III: R
EN
= open
D
ON_BM
R
PG
80% R
PG
= 0
75% R
PG
= 100 k
65% R
PG
= 180 k
0% R
PG
open
