MAX1190
Dual 10-Bit, 120Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
20 ______________________________________________________________________________________
Grounding, Bypassing, and
Board Layout
The MAX1190 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to the
device as possible, preferably on the same side as the
ADC, using surface-mount devices for minimum induc-
tance. Bypass V
DD
, REFP, REFN, and COM with two
parallel 0.1µF ceramic capacitors and a 2.2µF bipolar
capacitor to GND. Follow the same rules to bypass the
digital supply (OV
DD
) to OGND. Multilayer boards with
separated ground and power planes produce the
highest level of signal integrity. Consider the use of a split
ground plane arranged to match the physical location of
the analog ground (GND) and the digital output driver
ground (OGND) on the ADC’s package. The two ground
planes should be joined at a single point such that the
noisy digital ground currents do not interfere with the ana-
log ground plane. The ideal location of this connection
can be determined experimentally at a point along the
gap between the two ground planes, which produces
optimum results. Make this connection with a low-value,
surface-mount resistor (1Ω to 5Ω), a ferrite bead, or a
direct short. Alternatively, all ground pins could share the
same ground plane if the ground plane is sufficiently iso-
lated from any noisy, digital systems ground plane (e.g.,
downstream output buffer or DSP ground plane). Route
high-speed digital signal traces away from the sensitive
analog traces of either channel. Make sure to isolate the
analog input lines to each respective converter to mini-
mize channel-to-channel crosstalk. Keep all signal lines
short and free of 90° turns.
Static Parameter Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from a straight line. This straight
line can be either a best-straight-line fit or a line drawn
between the endpoints of the transfer function, once off-
set and gain errors have been nullified. The static linearity
parameters for the MAX1190 are measured using the
best-straight-line fit method.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an actu-
al step width and the ideal value of 1 LSB. A DNL error
specification of less than 1 LSB guarantees no missing
codes and a monotonic transfer function.
Dynamic Parameter Definitions
Aperture Jitter
Figure 11 depicts the aperture jitter (t
AJ
), which is the
sample-to-sample variation in the aperture delay.
Aperture Delay
Aperture delay (t
AD
) is the time defined between the
falling edge of the sampling clock and the instant when
an actual sample is taken (Figure 11).
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error). The ideal, theoretical
minimum analog-to-digital noise is caused by quantiza-
tion error only and results directly from the ADC’s reso-
lution (N bits):
SNR
dB[max]
= 6.02
dB
✕ N + 1.76
dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion (SINAD)
SINAD is computed by taking the ratio of the RMS sig-
nal to all spectral components minus the fundamental
and the DC offset.
Effective Number of Bits (ENOB)
ENOB specifies the dynamic performance of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. ENOB for
a full-scale sinusoidal input waveform is computed from:
