TEA1752LT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 15 November 2012 9 of 33
NXP Semiconductors
TEA1752LT
HV start-up flyback controller with integrated PFC controller
At initial start-up, switching is stopped until the capacitor on the LATCH pin is charged
above 1.35 V. No internal filtering is done on this pin. An internal Zener clamp of 2.9 V
protects this pin from excessive voltages.
7.1.4 Fast latch reset
In a typical application, the mains is interrupted briefly to reset the latched protection. The
PFC bus capacitor, C
bus
, does not have to discharge for this latched protection to reset.
When the VINSENSE voltage drops below 750 mV and is then raised to 870 mV, the
latched protection is reset.
The latched protection is also reset by removing the voltage on the V
CC
and HV pins.
7.1.5 Overtemperature protection
An accurate internal temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shut-down temperature, the IC stops switching. While
OTP is active, the capacitor C
VCC
is not recharged from the HV mains. If the V
CC
supply
voltage is not sufficient, the OTP circuit is supplied from the HV pin.
OTP is a latched protection. It is reset by removing the voltage on the V
CC
and HV pins or
by the fast latch reset function (see Section 7.1.4
).
7.2 Power factor correction circuit
The power factor correction circuit operates in quasi-resonant or Discontinuous
Conduction Mode (DCM) with valley switching. The next primary stroke is only started
when the previous secondary stroke has ended and the voltage across the PFC MOSFET
has reached a minimum value. V
PFCAUX
is used to detect transformer demagnetization
and the minimum voltage across the external PFC MOSFET switch.
7.2.1 t
on
control
The power factor correction circuit is operated in t
on
control. The resulting mains harmonic
reduction is well within the class-D requirements.
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. To reduce switching losses and
electromagnetic Interference (EMI), the next stroke is started if the voltage across the
PFC MOSFET is at its minimum (valley switching).
If a demagnetization signal is not detected on the PFCAUX pin, the controller generates a
Zero Current Signal (ZCS). This ZCS occurs 50 s after the last PFCGATE signal.
If a valley signal is not detected on the PFCAUX pin, the controller generates a valley
signal 4 s after demagnetization is detected.
To protect the internal circuitry during lightning events, for example, add a 5 k series
resistor to PFCAUX. To prevent incorrect switching due to external disturbance, place the
resistor close to the IC on the printed-circuit board.
