[AK4117]
MS0157-E-04 2010/08
- 25 -
■ Register Definitions
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
00H Power Down Control 0 0 0 EXCK XTL1 XTL0 PWN RSTN
R/W RD RD RD R/W R/W R/W R/W R/W
Default 0 0 0 0 0 0 1 1
RSTN: Timing Reset & Register Initialize
0: Reset & Initialize (except RSTN, PWN, XTL1-0 and EXCK bits)
1: Normal Operation (Default)
PWN: Power-Down for Clock Recovery Part
0: Power Down
1: Normal Operation (Default)
XTL1-0: Reference X’tal Frequency Select (
Table 4; Default: 00)
EXCK: External Clock Mode Select
0: X’tal mode (Default)
1: External clock mode (Feedback resistor of X’tal oscillator circuit is open.)
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
01H Clock Control LP PCKS1 PCKS0 DIV XCKS1 XCKS0 CM1 CM0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Default 1 0 1 0 0 1 0 0
CM1-0: Master Clock Operation Mode Select (
Table 1; Default: 00)
XCKS1-0: Master Clock Frequency Select at X’tal Mode (
Table 3; Default: 01)
DIV: Master Clock Output Select at X’tal Mode
0: Same frequency as X’tal (Default)
1: Half frequency of X’tal
PCKS1-0: Master Clock Frequency Select at PLL Mode (
Table 2; Default: 01)
LP: Low Power Mode Select (
Table 2)
0: Normal mode
1: Low power mode (Default)
In low power mode, fs cannot exceed 48kHz.
