OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC1098LCS8#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
LTC1096/LTC1096L
LTC1098/LTC1098L
25
10968fc
MICROPROCESSOR INTERFACES
The LTC1096(L)/LTC1098(L) can interface directly (without
external hardware to most popular microprocessor (MPU)
synchronous serial formats (see Table 1). If an MPU without
a dedicated serial port is used, then three or four of the
MPU’s parallel port lines can be programmed to form the
serial link to the LTC1096(L)/LTC1098(L). Included here
is one serial interface example and one example showing
a parallel port programmed to form the serial interface.
Motorola SPI (MC68HC05C4,CM68HC11)
The MC68HC05C4 has been chosen as an example of
an MPU with a dedicated serial port. This MPU transfer
data MSB-fi rst and in 8-bit increments. With two 8-bit
transfers, the A/D result is read into the MPU. The fi rst
8-bit transfer sends the D
IN
word to the LTC1098(L) and
clocks into the processor. The second 8-bit transfer clocks
the A/D conversion result, B7 through B0, into the MPU.
ANDing the fi rst MUP received byte with 00Hex clears the
fi rst byte. Notice how the position of the start bit in the
fi rst MPU transmit word is used to position the A/D result
right-justifi ed in two memory locations.
APPLICATIONS INFORMATION
TYPICAL APPLICATIONS
Effective Number of Bits
The effective number of bits (ENOBs) is a measurement
of the resolution of an A/D and is directly related to the
S/(N + D) by the equation:
ENOB = [S/(N + D) –1.76]/6.02
where S/(N + D) is expressed in dB. At the maximum sam-
pling rate of 33kHz the LTC1096 maintains 7.5 ENOBs or
better to 40kHz. Above 40kHz the ENOBs gradually decline,
as shown in Figure 12, due to increasing second harmonic
distortion. The noise fl oor remains approximately 70dB.
Figure 12. Dynamic Accuracy Is Maintained Up to an Input
Frequency of 40kHz
INPUT FREQUENCY (kHz)
0
EFFECTIVE NUMBER OF BITS (ENOBs)
3
4
5
10968 F12
2
1
0
20 40
6
7
8
f
SAMPLE
= 31.25kHz
Table 1. Microprocessor with Hardware Serial Interfaces
Compatible with the LTC1096(L)/LTC1098(L)
PART NUMBER TYPE OF INTERFACE
Motorola
MC6805S2,S3
MC68HC11
MC68HC05
SPI
SPI
SPI
RCA
CDP68HC05 SPI
Hitachi
HD6305
HD63705
HD6301
HD63701
HD6303
HD64180
SCI Synchronous
SCI Synchronous
SCI Synchronous
SCI Synchronous
SCI Synchronous
CSI/O
National Semiconductor
COP400 Family
COP800 Family
NS8050U
HPC16000 Family
MICROWIRE™
MICROWIRE/PLUS™
MICROWIRE/PLUS
MICROWIRE/PLUS
Texas Instruments
TMS7002
TMS7042
TMS70C02
TMS70C42
TMS32011*
TMS32020
Serial Port
Serial Port
Serial Port
Serial Port
Serial Port
Serial Port
* Requires external hardware
MICROWIRE and MICROWIRE/PLUS are trademarks of
National Semiconductor Corp.
LTC1096/LTC1096L
LTC1098/LTC1098L
26
10968fc
TYPICAL APPLICATIONS
MPU TRANSMIT
WORD
CS
CLK
D
OUT
MPU RECEIVED
WORD
D
IN
0001
ODD/
SIGN
MSBF
X
SGL/
DIFF
XXXXXXXX
START
BIT
BYTE 1 BYTE 2 (DUMMY)
X = DON'T CARE
START
SGL/
DIFF
DON'T CARE
B7 B6 B5 B4 B3 B2 B1 B0
ODD/
SIGN
MSBF
???????0
B7 B6 B5 B4 B3 B2 B1 B0
2ND TRANSFER1ST TRANSFER
10968 TA03
10968 TA04
CLK
D
IN
CS
ANALOG
INPUTS
C0
SCK
D
OUT
MISO
MOSI
MC68HC05C4
LTC1098
LOCATION A + 1
LSB
LOCATION A
BYTE 2
BYTE 1
10968 TA05
B7 B6 B5 B4 B3 B2 B1 B0
00000000
Data Exchange Between LTC1098(L) and MC68HC05C4
Hardware and Software Interface to Motorola MC68HC05C4
D
OUT
from LTC1098(L) Stored in MC68HC05C4
LABEL MNEMONIC COMMENTS
START BCLRn
LDA
STA
TST
BPL
LDA
STA
AND
STA
TST
BPL
BSETn
LDA
STA
Bit 0 Port C goes low (CS goes low)
Load LTC1098(L) D
IN
word into Acc.
Load LTC1098(L) D
IN
word into SPI from Acc.
Transfer begins.
Test status of SPIF
Loop to previous instruction if not done
with transfer
Load contents of SPI data register
into Acc. (D
OUT
MSBs)
Start next SPI cycle
Clear the fi rst D
OUT
word
Store in memory location A (MSBs)
Test status of SPIF
Loop to previous instruction if not done
with transfer
Set B0 of Port C (CS goes high)
Load contents of SPI data register into
Acc. (D
OUT
LSBs)
Store in memory location A + 1 (LSBs)
LTC1096/LTC1096L
LTC1098/LTC1098L
27
10968fc
TYPICAL APPLICATIONS
Interfacing to the Parallel Port of the
Intel 8051 Family
The Intel 8051 has been chosen to demonstrate the
interface between the LTC1098(L) and parallel port mi-
croprocessors. Normally the CS, CLK and D
IN
signals
would be generated on three port lines and the D
OUT
signal
read on a fourth port line. This works very well. However,
we will demonstrate here an interface with the D
IN
and
D
OUT
of the LTC1098(L) tied together as described in the
SERIAL INTERFACE section. This saves one wire.
The 8051 fi rst sends the start bit and MUX address to the
LTC1098(L) over the data line connected to P1.2. Then
P1.2 is reconfi gured as an input (by writing to it a one) and
the 8051 reads back the 8-bit A/D result over the same
data line.
D
OUT
from LTC1098(L) Stored in 8051 RAM
CS
CLK
D
OUT
D
IN
LTC1098(L)
ANALOG
INPUTS
P1.4
P1.3
P1.2
8051
MUX ADDRESS
A/D RESULT
10968 TA06
R2
10968 TA07
MSB
LSB
B7 B6 B5 B4 B3 B2 B1 B0
1
CS
CLK
DATA (D
IN
/D
OUT
)
START
ODD/
SIGN
MSBF
B7
MSBF BIT LATCHED
BY LTC1098(L)
LTC1098(L) SENDS A/D RESULT
BACK TO 8051 P1.2
8051 P1.2 OUTPUTS DATA
TO LTC1098(L)
8051 P1.2 RECONFIGURED
AS AN INPUT AFTER THE 4TH RISING
CLK AND BEFORE THE 4TH FALLING CLK
LTC1098(L) TAKES CONTROL OF DATA LINE
ON 4TH FALLING CLK
234
SGL/
DIFF
B6 B5 B4 B3 B2 B1 B0
10968 TA08
LABEL MNEMONIC OPERAND COMMENTS
LOOP 1
LOOP
MOV
SETB
CLR
MOV
RLC
CLR
MOV
SETB
DJNZ
MOV
CLR
MOV
MOV
RLC
SETB
CLR
DJNZ
MOV
SETB
A, #FFH
P1.4
P1.4
R4, #04
A
P1.3
P1.2, C
P1.3
R4, LOOP 1
P1, #04
P1.3
R4, #09
C, P1.2
A
P1.3
P1.3
R4, LOOP
R2, A
P1.4
D
IN
word for LTC1098(L)
Make sure CS is high
CS goes low
Load counter
Rotate D
IN
bit into Carry
CLK goes low
Output D
IN
bit to LTC1098(L)
CLK goes high
Next bit
Bit 2 becomes an input
CLK goes low
Load counter
Read data bit into Carry
Rotate data bit into Acc.
CLK goes high
CLK goes low
Next bit
Store MSBs in R2
CS goes high
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32

LTC1098LCS8#PBF

Mfr. #:
Buy LTC1098LCS8#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Analog to Digital Converters - ADC 8-bit 16.5ksps Micropower SAR ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet