LTC4302-1/LTC4302-2
16
sn430212 430212fs
APPLICATIO S I FOR ATIO
WUUU
Live Insertion and Removal, Capacitance Buffering
The application shown in Figure 12 highlights the live
insertion and removal, and capacitance buffering features
of the LTC4302. Note that if the I/O card were plugged
directly into the backplane, the card capacitance would
add directly to the backplane capacitance making rise and
fall time requirements difficult to meet. Placing a LTC4302
on the edge of the card, however, isolates the card capaci-
tance from the backplane. The LTC4302 drives the capaci-
tance of everything on the card, and the backplane must
drive only the capacitance of the LTC4302, which is less
than 10pF.
Assuming that a staggered connector is available, make
ground, V
CC
and V
CC2
the longest pins to guarantee that
SDAIN and SCLIN receive the 1V precharge voltage before
they connect. Make SDAIN and SCLIN medium length pins
to ensure that they are firmly connected while CONN is
low. Make CONN the shortest pin and connect a weak
resistor from CONN to ground on the I/O card. This
ensures that the LTC4302-1/LTC4302-2 remain in a high
impedance state while SDAIN and SCLIN are making
connection during live insertion. During live removal,
having CONN disconnect first ensures that the LTC4302
enters a high impedance state in a controlled manner
before SDAIN and SCLIN disconnect. Owing to the fact
that the LTC4302 powers into a high impedance state, and
also owing to the 1V precharge voltage and the less than
10pF pin capacitance, SDAIN and SCLIN cause minimal
disturbance on the backplane busses when they make
contact with the connector.
Address Expansion with Nested Addressing
Figure 13 illustrates how the LTC4302 can be used to
expand the number of devices in a system by using nested
addressing. Note that each I/O card contains a sensor
device having address 1111 111. If the two cards are
plugged directly into the backplane, the two sensors will
require two different addresses. However, each LTC4302
isolates the devices on its card from the rest of the system
until it is commanded to connect. If masters use the
LTC4302s to connect only one I/O card at a time, then each
I/O card can have a device with address 1111 111 and no
problems will␣ occur.
Glitch Filters
The LTC4302 provides glitch filters on both the SDAIN and
SCLIN signals as required by the I
2
C Fast Mode (400kHz)
specification. The filters prevent signals of up to 50ns
(minimum) time duration and rail-to-rail voltage magni-
tude from passing into the 2-wire bus digital interface
circuitry.
Fall Time Control
Per the I
2
C Fast Mode (400kHz) specification, the 2-wire
bus digital interface circuitry provides fall time control
when forcing logic lows onto the SDAIN bus. The fall time
always meets the limits:
(20 + 0.1 • C
B
) < t
f
< 300ns
where t
f
is the fall time in ns and C
B
is the equivalent
capacitance on SDAIN in pF. Whenever the connection
circuitry is passing logic lows from SDAOUT to SDAIN
(and vice versa), its output signal will meet the fall time
requirements, provided that its input signal meets the fall
time requirements.
OPERATIO
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