TEF6901A_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 20 March 2008 56 of 107
NXP Semiconductors
TEF6901A
Integrated car radio
8.2.18 Write mode: data byte INPUT
a. The controlling microprocessor generates 16 clock pulses for output of 16 bits of buffered
RDS data. This mode use is compatible with e.g. SAA770xH and TEF6890H.
b. The controlling microprocessor generates 20 clock pulses for output of 16 bits of buffered
RDS data, a separator bit (logic 1) and 3 bits of RDQ bit quality counter information.
RDQ: 111 = good reception, 000 = poor or no reception. RDQ counter decrements on
each bad quality data bit.
Fig 33. RDS demodulator buffered output mode (RDCL = 1); RDCL clock is input
001aab547
RDDA output
RDCL input
D15 D14 D0D13 D1
data
available
1 2 15 163
001aab548
RDDA output
RDCL input
D15 D0D1
data
available
Q0Q1Q2
1
15 16 17 18 19 20
Table 73. INPUT - format of data byte 10h with default setting
7 6 5 4 3 2 1 0
INP3 INP2 INP1 INP0 ING3 ING2 ING1 ING0
00001010
Table 74. INPUT - data byte 10h bit description
Bit Symbol Description
7 to 4 INP[3:0] input selection; selection of the audio source for the tone/volume part;
see
Table 75
3 to 0 ING[3:0] Input gain; −10 dB to +18 dB input gain. The ING input gain setting is
added to the VOL volume setting to define the actual volume control;
see
Table 76.
