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74ACT02MTCX

P1-P3P4-P6P7-P9P10-P10
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC02, 74ACT02 Rev. 1.5.1 4
74AC02, 74ACT02 — Quad 2-Input NOR Gate
DC Electrical Characteristics for ACT
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
Symbol Parameter
V
CC
(V) Conditions
T
A
= +25°C T
A
= –40°C to +85°C
UnitsTyp. Guaranteed Limits
V
IH
Minimum HIGH Level
Input Voltage
4.5 V
OUT
= 0.1V or
V
CC
– 0.1V
1.5 2.0 2.0 V
5.5 1.5 2.0 2.0
V
IL
Maximum LOW Level
Input Voltage
4.5 V
OUT
= 0.1V or
V
CC
– 0.1V
1.5 0.8 0.8 V
5.5 1.5 0.8 0.8
V
OH
Minimum HIGH Level
Output Voltage
4.5 I
OUT
= –50µA 4.49 4.4 4.4 V
5.5 5.49 5.4 5.4
4.5 V
IN
= V
IL
or V
IH
,
I
OH
= –24mA
3.86 3.76
5.5 V
IN
= V
IL
or V
IH
,
I
OH
= –24mA
(4)
4.86 4.76
V
OL
Maximum LOW Level
Output Voltage
4.5 I
OUT
= 50µA 0.001 0.1 0.1 V
5.5 0.001 0.1 0.1
4.5 V
IN
= V
IL
or V
IH
,
I
OL
= 24mA
0.36 0.44
5.5 V
IN
= V
IL
or V
IH
,
I
OL
= 24mA
(4)
0.36 0.44
I
IN
Maximum Input
Leakage Current
5.5 V
I
= V
CC
, GND ±0.1 ±1.0 µA
I
CCT
Maximum I
CC
/Input 5.5 V
I
= V
CC
– 2.1V 0.6 1.5 mA
I
OLD
Minimum Dynamic
Output Current
(5)
5.5 V
OLD
= 1.65V Max. 75 mA
I
OHD
5.5 V
OHD
= 3.85V Min. –75 mA
I
CC
Maximum Quiescent
Supply Current
5.5 V
IN
= V
CC
or GND 4.0 40.0 µA
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC02, 74ACT02 Rev. 1.5.1 5
74AC02, 74ACT02 — Quad 2-Input NOR Gate
AC Electrical Characteristics for AC
Note:
6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V.
AC Electrical Characteristics for ACT
Note:
7. Voltage Range 5.0 is 5.0V ± 0.5V.
Capacitance
Symbol Parameter V
CC
(V)
(6)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsMin. Typ. Max. Min. Max.
t
PLH
Propagation Delay 3.3 1.5 5.0 7.5 1.0 8.0 ns
5.0 1.5 4.0 6.0 1.0 6.5
t
PHL
Propagation Delay 3.3 1.5 5.0 7.5 1.0 8.0 ns
5.0 1.5 4.5 6.5 1.0 7.0
Symbol Parameter V
CC
(V)
(7)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsMin. Typ. Max. Min. Max.
t
PLH
Propagation Delay 5.0 1.0 6.0 8.5 1.0 9.0 ns
t
PHL
Propagation Delay 5.0 1.0 6.5 9.5 1.0 10.0 ns
Symbol Parameter Conditions Typ. Units
C
IN
Input Capacitance V
CC
= OPEN 4.5 pF
C
PD
Power Dissipation Capacitance V
CC
= 5.0V 30.0 pF
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC02, 74ACT02 Rev. 1.5.1 6
74AC02, 74ACT02 — Quad 2-Input NOR Gate
Physical Dimensions
Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www
.fairchildsemi.com/packaging/
LAND PATTERN RECOMMENDATION
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
PIN ONE
INDICATOR
8°
0°
SEATING PLANE
DETAIL A
SCALE: 20:1
GAGE PLANE
0.25
X45°
1
0.10
C
C
BC A
7
M
14
B
A
8
SEE DETAIL A
5.60
0.65
1.70 1.27
8.75
8.50
7.62
6.00
4.00
3.80
(0.33)
1.27
0.51
0.35
1.75 MAX
1.50
1.25
0.25
0.10
0.25
0.19
(1.04)
0.90
0.50
0.36
R0.10
R0.10
0.50
0.25
P1-P3P4-P6P7-P9P10-P10

74ACT02MTCX

Mfr. #:
Buy 74ACT02MTCX
Manufacturer:
ON Semiconductor / Fairchild
Description:
Logic Gates Qd 2-Input NOR Gate
Lifecycle:
New from this manufacturer.
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