LT8584
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operaTion
Serial Timer Decode Window
The timer initiates on the first negative edge on the D
IN
pin.
RTMR pin remains high for the duration of the timer which
signifies the decode window for the serial input counter.
A resistor from the RTMR pin to ground sets the decode
window duration. The duration can be accurately set from
1.9ms (R
RTMR
= 10k) to 31ms (R
RTMR
= 200k). The timer
can be set outside this range, but the accuracy decreases.
The serial input counter stops counting and latches the
data once the RTMR pin goes low; after which, the OUT
pin amplifier input MUX selects the desired measurement,
and the discharger is set to the right state.
Serial Communication Fault Modes
The serial interface has several fault monitors that prevent
entering undesired modes due to a communication error.
The OUT pin is set to V
VIN
– 1.4V to indicate the LT8584 is
in fault. The part remains in fault from the onset of RTMR
going high until the first count is detected. If no count is
seen by the serial input counter during the decode window,
the fault is latched. If the serial input counter counts higher
than 4 negative edges, the fault latch is
set.
A
third latching fault occurs if an internal undervoltage
lockout (UVLO) is detected during the decode window.
This protects against undesired operation if data latches
or the serial input counter were reset. The part must be
reset by taking D
IN
high to clear a fault.
D
IN
Pin and Serial Bus Timing
Several internal passive filters are added to the data bus
to prevent injected system noise corrupting serial com
-
munication. These filters have time constants that place
constraints on the serial communication timing require-
ments (see the
Timing Diagram). The LT8584 can reject
up tos of erroneous glitches on the D
IN
pin in either
direction. The power latch filter can also reject up to a
4µs glitch on D
IN
.
The D
IN
pin has built-in hysteresis of approximately 100mV.
This allows the serial input counter to recognize both slow
and fast edges without erroneous behavior. The discharger
activation or deactivation time is typically less thans
and is a direct indication of the switch enable latch state.
OUT Pin Analog MUX
An internal multiplexer, MUX, selects between V
CELL
and
the OUT pin amplifier based on one of the selected Serial
Modes shown in Table 1. The
OUT pin amplifier has a
5kΩ
internal load and has several inputs including: V
TEMP
,
the 19V
SNS
amplifier, and six handshake voltages. The
internal MUX defaults to V
CELL
in shutdown—consuming
no power in the process—and provides a 55nominal
resistance from the V
CELL
pin to the OUT pin. Figure 6
shows the connection of the OUT pin to a BSM and its
internal analog MUX.
The MUX switches over to one of the handshake voltage
levels once both the LT8584 and the decode window are
activated. The OUT amplifier will indicate a fault at start-up
until the serial input counter recognizes the first negative
edge on D
IN
. Subsequent negative edges on D
IN
cause the
MUX to select the handshake voltage corresponding to the
number of edges counted. These voltage levels provide a
means of verifying if the serial interface has recognized
the correct count. Note that the OUT pin amplifier has an
approximate 200µs one percent settling time when driving
a 220nF load capacitance.
Once the RTMR pin goes low, the MUX selects the OUT pin
mode corresponding to the number of serial input counts
(see Table 1 for available modes). The part can also
be
placed in shutdown when RTMR is low and the decode
window has expired.
V
CELL
Measurement
The user can measure the cell voltage by measuring
the voltage on the OUT pin either with the part disabled
(discharger off) or with the part enabled in MODE 1 (dis
-
charger on), see Table 1. The LT8584 uses an internal
PMOS switch with R
DSON
= 55Ω to connect V
CELL
to the
OUT pin. Note that any current flowing into or out of the
OUT pin will cause a measurement error due to the IR
drop across the switch.
V
SNS
19× Amplifier
An amplifier is provided to allow the user to monitor the
discharger current. This measurement can only be per
-
formed when the discharger is on (MODE 2). The differ-
ential voltage
between V
VCELL
and V
VSNS
is amplified 19×.
LT8584
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operaTion
8584 F06
LT8584
CONTROL
VCELL VSNS
R
SNS
VIN SW
ANALOG MUX
VCELL
VTEMP
VSNS AMP
VIN – 0.2V
VIN – 0.4V
VIN – 0.6V
VIN – 0.8V
VIN – 1.2V
VIN – 1.4V
COUNTER
OUT
C2
DIN
GND
MODE
RTMR
DCHRG
1:4
+
V
MODULE
LT8584
CONTROL
VCELL VSNS
R
SNS
VIN SW
ANALOG MUX
VCELL
VTEMP
VSNS AMP
VIN – 0.2V
VIN – 0.4V
VIN – 0.6V
VIN – 0.8V
VIN – 1.2V
VIN – 1.4V
COUNTER
OUT
DIN
GND
MODE
RTMR
DCHRG
1:4
+
V
MODULE
BAT2
+
+
BAT1
S2
C1
C0
S1
DCC1
BIT
DCC2
BIT
ADC
LTC680x
Figure 6. Serial Mode Analog MUX Connection
LT8584
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operaTion
This reduces errors due to input offset in the measure-
ment circuitry connected to the OUT pin. It also allows
the
use of low-value resistors, and thus, yields greater
overall efficiency.
For accuracy, the V
IN
pin should be tied to the V
SNS
pin to
include both the LT8584 bias current and the internal NPN
base drive current. Tying the V
IN
pin to the V
SNS
pin changes
the overall gain to 20x. Tying the V
IN
pin to the V
CELL
measures
transformer current only and the overall gain remains 19x.
The V
SNS
amplifier has a –30mV to 70mV dynamic input
range. Internal filtering and circuit architecture allows ac-
curate measurements even
when the input current contains
negative components. The V
SNS
amplifier requires that the
average input current remain positive. V
VIN
V
OUT
is not
allowed to exceed 1V during V
SNS
measurement to guarantee
that both V
FAULT
and V
SW,ERR
are deterministic. This sets the
maximum average input range, V
VCELL
V
VSNS
, to 50mV.
Die Temperature Output
The user can also monitor the die temperature by se
-
lecting either
MODE 3 (discharger enabled) or MODE 4
(discharger disabled). The voltage V
VCELL
V
OUT
, V
TEMP
,
is proportional to the absolute temperature in degrees
Kelvin.
Thus, the user needs to take two measurements
to calculate the die temperature. Temperature data gives
the user a second means to verify if the discharger is on
as well as to monitor environmental conditions. V
TEMP
is
not allowed to exceed 1V (equivalent to 180°C)
1
to make
both V
FAULT
and V
SW,ERR
deterministic.
The following equation is used to determine the internal
die temperature in degrees Celsius:
T
J
(°C) =
V
TEMP
0.609
0.00197
where V
TEMP
= V
VCELL
V
OUT
and expressed in volts.
Although the absolute die temperature can deviate from
the above equation by ±25°C, the relationship between
V
TEMP
and the change in die temperature is well defined.
The offset error can be calibrated out using an accurate
system temperature monitor like that in the LTC680x family
of parts. There is also a small V
VCELL
dependence on V
TEMP
which can be corrected using the following expression:
T
J,CORR
(°C) = T
J,CAL
+ (4.2V – V
CELL
) • 2°C
where T
J,CORR
is the corrected die temperature and T
J,CAL
is die temperature calculated from the previous equation.
Serial Mode Differential Measurements
All parameters including handshake voltages, V
SNS
, and
V
TEMP
are extracted differentially by taking two sequential
measurements and doing a subtraction. Figure 7 shows
the method for extracting a given parameter, V
PAR
, from
the highlighted LT8584. The LT8584 directly below the
LT8584 under measurement must be forced to select
V
CELL
(MODE 0) and becomes the negative reference for
both sequential measurements.
Table 2. MODE Selection During Differential Measurements
SERIAL MODE STATE
DESIRED PARAMETER 1ST MEASUREMENT 2ND MEASUREMENT
Handshake Voltage MODE 0
During Decode
Window
V
SNS
MODE 1 MODE 2
V
TEMP
, Balancer Enabled MODE 1 MODE 3
V
TEMP
, Balancer Disabled MODE 0 MODE 4
Selecting V
CELL
for the first measurement is performed
by entering either MODE 0 (balancer disabled) or MODE 1
(balancer enabled). Use Table 2 to determine which V
CELL
to reference for a given parameter. All measurements
are taken after the decode window has expired, unless
otherwise noted.
V
PAR
= 1st Measurement – (2nd Measurement)
= V
CELL
– (V
CELL
– V
PAR
)
The LTC6803’s channel above the channel under measure-
ment will
have
a voltage higher than a standard cell, V
CELL
+ V
PAR
, see Figure 7. The LT8584 was architected to protect
the LTC6803’s ADC inputs and to guarantee that they well
never be stressed beyond their absolute maximum rating.
DCHRG Output
The DCHRG pin allows the LT8584 to operate several dis
-
chargers in parallel. The DCHRG pin goes high when the
switch
enable latch is set. The DCHRG pin can be used to
directly drive the DCHRG pin of another LT8584 configured
in simple mode (MODE pin connected to V
IN
) or to directly
drive the shutdown pin of another power converter. It has
the ability to sink or sour
ce currents up to 300µA.
1
Not verified during production testing.

LT8584IFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 2.5A Mono Active Cell Balancer w/ Teleme
Lifecycle:
New from this manufacturer.
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