7 www.fairchildsemi.com
GTLP18T612
Test Circuits and Timing Waveforms
Test Circuit for A Outputs
Note A: C
L
includes probes and Jig capacitance.
Test Circuit for B Outputs
Note B: For B Port, C
L
= 30 pF is used for worst case.
Voltage Waveform - Propagation Delay Times Voltage Waveform - Setup and Hold Times
Voltage Waveform - Pulse Width Voltage Waveform - Enable and Disable times
Output Waveform 1 is for an output with internal conditions such that the
output is LOW except when disabled by the control output.
Output Waveform 2 is for an output with internal conditions such that the
output is HIGH except when disabled by the control output.
Input and Measure Conditions
All input pulses have the following characteristics: Frequency = 10MHz, t
RISE
= t
FALL
= 2 ns (10% to 90%), Z
O
= 50Ω.
The outputs are measured one at a time with one transition per measurement.
Test S
t
PLH
/t
PHL
Open
t
PLZ
/t
PZL
6V
t
PHZ
/t
PZH
GND
A or LVTTL
Pins
B or GTLP
Pins
V
inHIGH
3.0 1.5
V
inLOW
0.0 0.0
V
M
1.5 1.0
V
X
V
OL
+ 0.3V N/A
V
Y
V
OH
− 0.3V N/A
