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Document Number: DS-000121
Revision: 1.3
SYNCHRONIZING MICROPHONES
ICS-52000 microphones are synchronized by the WS signal, so audio captured from multiple microphones sharing the same clock will
be sampled synchronously.
TDM DATA INTERFACE
The slave serial data port’s format is TDM, 24-bit, twos complement and up to 16 ICS-52000 microphones can be daisy-chained
together on a single data bus. There must be 64, 128, 256 or 512 SCK cycles in each WS frame. Each microphone will output 24-bit
data in subsequent 32-bit slots. Tie the SD pins of all ICS-52000 microphones driving the data bus together as shown in Figure 9. The
ICS-52000 will always be a slave on the TDM bus.
The word select/word clock signals of the microphones in the system will be daisy-chained so that the clock master drives WS of the
first ICS-52000, whose WSO will drive WS of the second ICS-52000, and so on; the last ICS-52000 in the chain can leave WSO
disconnected. See Figure 9 for an illustration of these connections. The ICS-52000’s WS clock input is sampled on the rising edge of
SCK and the falling edge of WS can come anywhere before the start of the next frame. The ICS-52000 connected directly to the
system’s clock master will output its data in the first TDM slot, the next microphone in the chain will output its data in the second
TDM slot, and so on.
The frequency of SCK will depend on the number of microphones in the system. The SCK frequency should be n × 32 × f
S
, where n is
a power of two (2, 4, 8, or 16) equal to or greater than the number of ICS-52000s on the bus. Table 8 shows the recommended SCK
frequency for a chain of ICS-52000 microphones.
Table 8. SCK Frequency
Number of ICS-52000 Microphones
SCK Frequency, based on WS frequency (f
S
S
S
S
S
Figure 10 shows the format of an n-channel TDM data stream. Figure 11 zooms in on a single TDM data slot as output from a single
ICS-52000 microphone.
Data Output Format
The output data word length is 24 bits/channel. The data word format is 2’s complement, MSB-first.
The serial TDM data output bits are triggered on SCK’s rising edge. The receiver (DSP, codec, microcontroller) should sample that
data bit on the next SCK rising edge. This is illustrated in Figure 11; SCK rising edge A triggers the SD output bit and the receiver
should sample the data at its input on SCK rising edge B. The data is formatted in this way to support the internal propagation delay
of the microphone data at high SCK frequencies.
The output data pin (SD) is tri-stated when it is not actively driving TDM output data. SD will immediately tri-state after the LSB is
output so that another microphone can drive the common data line.
The SD trace should have a pull-down resistor to discharge the line during the time that all microphones on the bus have tri-stated
their outputs. A 100 kΩ or smaller resistor is sufficient for this, as shown in Figure 9.
