74LVCH322245A_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 20 August 2007 7 of 13
NXP Semiconductors
74LVCH322245A
32-bit bus transceiver with direction pin, 30 Ω resistors
10. Dynamic characteristics
[1] Typical values are measured at T
amb
=25°C and V
CC
= 1.2 V, 2.7 V, and 3.3 V respectively.
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+Σ(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz; f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts
N = number of inputs switching
Σ(C
L
× V
CC
2
× f
o
) = sum of the outputs.
11. Waveforms
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter Conditions V
CC
(V) Min Typ
[1]
Max Unit
T
amb
= −40 °C to +85 °C
t
pd
propagation delay nAn to nBn; nBn to nAn; see
Figure 4
1.2
[2]
-12-ns
2.7 1.0 4.2 6.7 ns
3.0 to 3.6 1.0 3.3 5.7 ns
t
en
enable time nOE to nAn, nBn: see Figure 5 1.2
[2]
-18-ns
2.7 1.5 5.1 8.5 ns
3.0 to 3.6 1.0 3.4 7.5 ns
t
dis
disable time nOE to nAn, nBn; see Figure 5 1.2
[2]
-10-ns
2.7 1.5 3.5 7.5 ns
3.0 to 3.6 1.5 3.3 6.5 ns
t
sk(o)
output skew time 3.0 to 3.6
[3]
- - 1.0 ns
C
PD
power dissipation
capacitance
per buffer; V
I
= GND to V
CC
3.3
[4]
-28-pF
V
M
= 1.5 V at V
CC
≥ 2.7 V
V
M
= 0.5 × V
CC
at V
CC
< 2.7 V
V
OL
and V
OH
are typical output voltage levels that occur with the output load
Fig 4. The input (nAn, nBn) to output (nBn, nAn) propagation delays
mna477
nAn, nBn
input
nBn, nAn
output
t
PHL
t
PLH
GND
V
I
V
M
V
M
V
OH
V
OL
