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NCP3102CMNTXG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
NCP3102C
http://onsemi.com
10
Normal Shutdown Behavior
Normal shutdown occurs when the IC stops switching
because the input supply reaches UVLO threshold. In this
case, switching stops, the internal soft start, SS, is
discharged, and all gate pins are driven low. The switch node
enters a high impedance state and the output capacitors
discharge through the load with no ringing on the output
voltage.
External Soft--Start
The NCP3102C features an external soft start function,
which reduces inrush current and overshoot of the output
voltage. Soft start is achieved by using the internal current
source of 10 mA (typ), which charges the external integrator
capacitor of the transconductance amplifier. Figures 21
and 22 are typical soft start sequences. The sequence begins
once V
CC
surpasses its UVLO threshold. During Soft Start
as the Comp Pin rises through 400 mV, the PWM logic and
gate drives are enabled. When the feedback voltage crosses
800 mV, the EOTA will be given control to switch to its
higher regulation mode with the ability to source and sink
130 mA. In the event of an over current during the soft start,
the overcurrent logic will override the soft start sequence
and will shut down the PWM logic and both the high side and
low side gates of the switching MOSFETS.
Vcomp
0.83V
Vfb
Isource/
sink
10uA
--10uA
120uA
Normal
Start up
0.4V0.4V
SS
Enable
10uA
0.8V
Figure 21. Soft--Start I mplementation
VCC
COMP
VFB
BG
TG
BG Comparator
DAC Voltage
BG Comparator
Output
Vout
50mV
500mV
UVLO
POR
Delay
Current
Trip Set
COMP
Delay
Normal Operation
UVLO
0.9 V
4.3 V
3.4 V
Figure 22. Soft--Start Sequence
UVLO
Under Voltage Lockout (UVLO) is provided to ensure that
unexpected behavior does not occur when V
CC
is too low to
support the internal rails and power the converter. For the
NCP3102C, the UVLO is set to ensure that the IC will start
up when VCC reaches 4.0 V and shutdown when V
CC
drops
below 3.6 V. The UVLO feature permits smooth operation
from a varying 5.0 V input source.
Current Limit Protection
In case of a short circuit or overload, the low--side (LS)
FET will conduct large currents. The low--side R
DS(on)
sense
is implemented to protect from over current by comparing
the voltage at the phase node to AGND just prior to the low
side MOSFET turnoff to an internally generated fixed
voltage. If the differential phase node voltage is lower than
OC trip voltage, an overcurrent condition occurs and a
counter is initiated. If seven consecutive over current trips
are counted, the PWM logic and both HS--FET and LS--FET
are latch off. The converter will be latched off until input
power drops below the UVLO threshold. The operation of
key nodes are displayed in Figure 23 for both normal
operation and during over current conditions.
NCP3102C
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11
Switch Node
2V
2V
HS Gate Drive
Switch Node Comparator
BG Comparator
2V
LS Gate Drive
SCP Trip Voltage
C Phase
SCP Comparator/
Latch Output
Figure 23. Switching and Current Limit Timing
Overcurrent Threshold Setting
The NCP3102C overcurrent threshold can be set from
50 mV to 450 mV by adding a resistor (RSET) between BG
and GND. During a short period of time following V
CC
rising above the UVLO threshold, an internal 10 mA current
(IOCSET) is sourced from the BG pin, creating a voltage
drop across RSET. The voltage drop is compared against a
stepped internal voltage ramp. Once the internal stepped
voltage reaches the RSET voltage, the value is stored
internally until power is cycled. The overall time length for
the OC setting procedure is approximately 3 ms. When
connecting an RSET resistor between BG and GND, the
programmed threshold will be:
I
OCth
=
I
OCSET
*R
SET
R
DS(on)
→ 12.5 A =
10 mA*10kΩ
8mΩ
(eq. 1)
I
OCSET
= Sourced current
I
OCTH
= Current trip threshold
R
DS(on)
= On resistance of the low side MOSFET
R
SET
= Current set resistor
The RSET values range from 5 kΩ to 45 kΩ.IfRSETis
not connected or the RSET value is too high, the device
switches the OCP threshold to a fixed 96 mV value (12 A)
typical at 12 V. The internal safety clamp on BG is triggered
as soon as BG voltage reaches 700 mV, enabling the 96 mV
fixed threshold and ending the OC setting period. The
current trip threshold tolerance is ±25 mV. The accuracy is
best at the highest set point (550 mV). The accuracy will
decrease as the set point decreases.
Drivers
The NCP3102C drives the internal high and low side
switching MOSFETS with 1 A gate drivers. The gate drivers
also include adaptive non--overlap circuitry. The
non--overlap circuitry increases efficiency which minimizes
power dissipation by minimizing the low--side MOSFET
body diode conduction time.
A block diagram of the non--overlap and gate drive
circuitry used is shown in Figure 25.
Figure 24. Block Diagram
UVLO
FAULT
+
--
2V
+
--
2V
PHASE
TG
BST
V
CC
BG
GND
UVLO
FAULT
PWM
OUT
Careful selection and layout of external components is
required to realize the full benefit of the onboard drivers.
The capacitors between V
CC
and GND and between BST
and CPHS must be placed as close as possible to the IC. A
ground plane should be placed on the closest layer for return
currents to GND in order to reduce loop area and inductance
in the gate drive circuit.
NCP3102C
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12
APPLICATION SECTION
Design Procedure
When starting the design of a buck regulator, it is
important to collect as much information as possible about
the behavior of the input and output before starting the
design.
ON Semiconductor has a Microsoft Excel based design
tool available online under the design tools section of the
NCP3102C product page. The tool allows you to capture
your design point and optimize the performance of your
regulator based on your design criteria.
Table 4. DESIGN PARAMETERS
Design Parameter Example Value
Input voltage (V
CC
) 10.8 V to 13.2 V
Output voltage (V
OUT
) 3.3 V
Input ripple voltage (VCC
RIPPLE
) 300 mV
Output ripple voltage (V
OUTRIPPLE
) 40 mV
Output current rating (I
OUT
) 10 A
Operating frequency (F
SW
) 275 kHz
The buck converter generates input voltage V
CC
pulses
that are LC filtered to produce a lower DC output voltage
V
OUT
. The output voltage can be changed by modifying the
on time relative to the switching period T or switching
frequency. The ratio of high side switch on time to the
switching period is called duty ratio D. Duty ratio can also
be calculated using V
OUT
,V
CC
, Low Side Switch Voltage
Drop V
LSD
, and High Side Switch Voltage Drop V
HSD
.
F
SW
=
1
T
(eq. 2)
D =
T
ON
T
(
1 − D
)
=
T
OFF
T
(eq. 3)
D =
V
OUT
+ V
LSD
V
CC
− V
HSD
+ V
LSD
≈ D =
V
OUT
V
CC
→
(eq. 4)
27.5% =
3.3 V
12 V
D = Duty cycle
F
SW
= Switching frequency
T = Switching period
T
OFF
= High side switch off time
T
ON
= High side switch on time
V
HSD
= High side switch voltage drop
VCC = Input voltage
V
LSD
= Low side switch voltage drop
V
OUT
= Output voltage
Inductor Selection
When selecting an inductor, the designer may employ a
rule of thumb for the design where the percentage of ripple
current in the inductor should be between 10% and 40%.
When using ceramic output capacitors, the ripple current
can be greater because the ESR of the output capacitor is
small, thus a user might select a higher ripple current.
However, when using electrolytic capacitors, a lower ripple
current will result in lower output ripple due to the higher
ESR of electrolytic capacitors. The ratio of ripple current to
maximum output current is given in Equation 5.
ra =
ΔI
I
OUT
(eq. 5)
ΔI = Ripple current
I
OUT
= Output current
ra = Ripple current ratio
Using the ripple current rule of thumb, the user can establish
acceptable values of inductance for a design using
Equation 6.
L
OUT
=
V
OUT
I
OUT
*ra*F
SW
*
(
1 − D
)
→
(eq. 6)
3.35 mH =
3.3 V
10 A * 26% * 275 kHz
*
(
1 − 27.5%
)
D = Duty ratio
F
SW
= Switching frequency
I
OUT
= Output current
L
OUT
= Output inductance
ra = Ripple current ratio
Figure 25. Inductance vs. Current Ripple Ratio
INDUCTANCE (mH)
RIPPLE CURRENT RATIO (%)
3.3 mH
0
1
2
3
4
5
6
7
8
9
10 13 16 19 22 25 28 31 34 37 4
0
5V
7V
13V
When selecting an inductor, the designer must not exceed
the current rating of the part. To keep within the bounds of
the part’s maximum rating, a calculation of the RMS current
and peak current are required.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

NCP3102CMNTXG

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Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators INTEGRATED SWITCHER
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