NCP3102C
http://onsemi.com
13
I
RMS
= I
OUT
*1+
ra
2
12
(eq. 7)
10.03 A = 10 A * 1 +
26%
2
12
I
OUT
= Output current
I
RMS
= Inductor RMS current
ra = Ripple current ratio
I
PK
= I
OUT
*
1 +
ra
2
11.3 A = 10 A *
1 +
26%
2
(eq. 8)
I
OUT
= Output current
I
PK
= Inductor peak current
ra = Ripple current ratio
A standard inductor should be found so the inductor will
be rounded to 3.3 mH. The inductor should support an RMS
current of 10.03 A and a peak current of 11.3 A.
The final selection of an output inductor has both
mechanical and electrical considerations. From a
mechanical perspective, smaller inductor values generally
correspond to smaller physical size. Since the inductor is
often one of the largest components in the regulation system,
a minimum inductor value is particularly important in space
constrained applications. From an electrical perspective, the
maximum current slew rate through the output inductor for
a buck regulator is given by Equation 9.
SlewRate
LOUT
=
V
CC
V
OUT
L
OUT
2.64 Ams =
12 V 3.3 V
3.3 mH
(eq. 9)
L
OUT
= Output inductance
V
CC
= Input voltage
V
OUT
= Output voltage
Equation 9 implies that larger inductor values limit the
regulators ability to slew current through the output
inductor in response to outputload transients. Consequently,
output capacitors must supply the load current until the
inductor current reaches the output load current level.
Reduced inductance to increase slew rates results in larger
values of output capacitance to maintain tight output voltage
regulation. In contrast, smaller values of inductance
increase the regulators maximum achievable slew rate and
decrease the necessary capacitance at the expense of higher
ripple current. The peak--to--peak ripple current is given by
the following equation:
I
PP
=
V
OUT
1 D
L
OUT
*F
SW
(eq. 10)
2.64 A =
3.3 V
1 27.5%
3.3 mH*275kHz
D = Duty ratio
F
SW
= Switching frequency
I
PP
= Peak--to--peak current of the inductor
L
OUT
= Output inductance
V
OUT
= Output voltage
From Equation 10 the ripple current increases as L
OUT
decreases, emphasizing the trade--off between dynamic
response and ripple current.
The power dissipation of an inductor falls into two
categories: copper and core losses. Copper losses can be
further categorized into DC losses and AC losses. A good
first order approximation of the inductor losses can be made
using the DC resistance as shown below:
LP
CU_DC
= I
RMS
2
* DCR 171 mW = 10.03
2
*1.69mΩ
(eq. 11)
I
RMS
= Inductor RMS current
DCR = Inductor DC resistance
LP
CU_DC
= Inductor DC power dissipation
The core losses and AC copper losses will depend on the
geometry of the selected core, core material, and wire used.
Most vendors will provide the appropriate information to
make accurate calculations of the power dissipation, at
which point the total inductor losses can be captured by the
equation below:
LP
tot
= LP
CU_DC
+ LP
CU_AC
+ LP
Core
(eq. 12)
352 mW = 171 mW + 19 mW + 162 mW
LP
CU_DC
= Inductor DC power dissipation
LP
CU_AC
= Inductor AC power dissipation
LP
Core
= Inductor core power dissipation
Output Capacitor Selection
The important factors to consider when selecting an
output capacitor are DC voltage rating, ripple current rating,
output ripple voltage requirements, and transient response
requirements.
The output capacitor must be rated to handle the ripple
current at full load with proper derating. The RMS ratings
given in datasheets are generally for lower switching
frequency than used in switch mode power supplies, but a
multiplier is usually given for higher frequency operation.
The RMS current for the output capacitor can be calculated
below:
CO
RMS
= I
OUT
ra
12
0.75 A = 10 A
26%
12
(eq. 13)
Co
RMS
= Output capacitor RMS current
I
OUT
= Output current
ra = Ripple current ratio
The maximum allowable output voltage ripple is a
combination of the ripple current selected, the output
capacitance selected, the Equivalent Series Inductance
(ESL), and Equivalent Series Resistance (ESR).
The main component of the ripple voltage is usually due
to the ESR of the output capacitor and the capacitance
selected, which can be calculated as shown in Equation 14:
NCP3102C
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14
V
ESR_C
= I
OUT
*ra
CO
ESR
+
1
8*F
SW
*C
OUT
(eq. 14)
32.4 mV = 10 * 26%
12 mΩ +
1
8 * 275 kHz * 1000 mF
Co
ESR
= Output capacitor ESR
C
OUT
= Output capacitance
F
SW
= Switching frequency
I
OUT
= Output current
ra = Ripple current ratio
The ESL of capacitors depends on the technology chosen,
but tends to range from 1 nH to 20 nH, where ceramic
capacitors have the lowest inductance and electrolytic
capacitors have the highest. The calculated contributing
voltage ripple from ESL is shown for the switch on and
switch off below:
V
ESLON
=
ESL * I
PP
*F
SW
D
(eq. 15)
7.8 mV =
3 nH * 2.64 A * 275 kHz
27.5%
V
ESLOFF
=
ESL * I
PP
*F
SW
1 D
(eq. 16)
2.96 mV =
3 nH * 2.64 A * 275 kHz
1 27.5%
D = Duty ratio
ESL = Capacitor inductance
F
SW
= Switching frequency
Ipp = Peak--to--peak current
The output capacitor is a basic component for fast
response of the power supply. For the first few microseconds
of a load transient, the output capacitor supplies current to
the load. Once the regulator recognizes a load transient, it
adjusts the duty ratio, but the current slope is limited by the
inductor value.
During a load step transient, the output voltage initially
drops due to the current variation inside the capacitor and the
ESR (neglecting the effect of the ESL). The user must also
consider the resistance added due to PCB traces and any
connections to the load. The additional resistance must be
added to the ESR of the output capacitor.
ΔV
OUT--ESR
= I
TRAN
×
CO
ESR
+ RCON
(eq. 17)
71 mV = 5A×
12 mΩ + 2.2 mΩ
Co
ESR
= Output capacitor Equivalent Series
Resistance
I
TRAN
= Output transient current
ΔV
OUT
_
ESR
= Voltage deviation of V
OUT
due to the
effects of ESR
A minimum capacitor value is required to sustain the
current during the load transient without discharging it. The
voltage drop due to output capacitor discharge is given by
the following equation:
ΔV
OUT--DIS
=
I
TRAN
2
× L
OUT
2*D
MAX
*C
OUT
×
V
CC
V
OUT
(eq. 18)
4.9 mV =
5A
2
× 3.3 mH
2*82%*820mF ×
12 V 3.3 V
C
OUT
= Output capacitance
D
MAX
= Maximum duty ratio
I
TRAN
= Output transient current
L
OUT
= Output inductor value
VCC = Input voltage
V
OUT
= Output voltage
ΔV
OUT
_
DIS
= Voltage deviation of V
OUT
due to the
effects of capacitor discharge
In a typical converter design, the ESR of the output
capacitor bank dominates the transient response. Please note
that ΔV
OUT
_
DIS
and ΔV
OUT_ESR
are out of phase with each
other, and the larger of these two voltages will determine the
maximum deviation of the output voltage (neglecting the
effect of the ESL).
Table 5 shows values of voltage drop and recovery time
of the NCP3102C demo board with the configuration shown
in Figure 26. The transient response was measured for the
load current step from 5 A to 10 A (50% to 100% load).
Input capacitors are 2 x 47 mF ceramic and 5 x 270 mF
OS--CON, output capacitors are 2 x 100 mF ceramic and
OS--CON as mentioned in Table 5. Typical transient
response waveforms are shown in Figure 26.
More information about OS--CON capacitors is available
at http://www.edc.sanyo.com
.
Table 5. TRANSIENT RESPONSE VERSUS OUTPUT
CAPACITANCE
(50% to 100% Load Step)
COUT OS--CON (mF)
Drop
(mV)
Recovery Time
(ms)
100 226 504
150 182 424
220 170 264
270 149 233
560 112 180
680 100 180
820 96 180
1000 71 180
2X680 60 284
2X820 40 284
NCP3102C
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15
Figure 26. Typical Waveform of Transient Response
Input Capacitor Selection
The input capacitor has to sustain the ripple current
produced during the on time of the upper MOSFET,
therefore must have a low ESR to minimize losses. The
RMS value of the input ripple current is:
IIN
RMS
= I
OUT
× D ×
1 D
(eq. 19)
4.47 A = 10 A 27.5% ×
1 27.5%
D = Duty ratio
IIN
RMS
= Input capacitance RMS current
I
OUT
= Load current
The equation reaches its maximum value with D = 0.5.
Loss in the input capacitors can be calculated with the
following equation:
P
CIN
= CIN
ESR
×
IIN
RMS
2
(eq. 20)
199.8 mW = 10 mΩ ×
4.47 A
2
CIN
ESR
= Input capacitance Equivalent Series
Resistance
IIN
RMS
= Input capacitance RMS current
P
CIN
= Power loss in the input capacitor
Due to large di/dt through the input capacitors,
electrolytic or ceramics should be used. If a tantalum
capacitor must be used, it must be surge protected, otherwise
capacitor failure could occur.
Power MOSFET Dissipation
Power dissipation, package size, and the thermal
environment drive power supply design. Once the
dissipation is known, the thermal impedance can be
calculated to prevent the specified maximum junction
temperatures from being exceeded at the highest ambient
temperature.
Power dissipation has two primary contributors:
conduction losses and switching losses. The high--side
MOSFET will display both switching and conduction
losses. The switching losses of the low side MOSFET will
not be calculated as it switches into nearly zero voltage and
the losses are insignificant. However, the body diode in the
low--side MOSFET will suffer diode losses during the
non--overlap time of the gate drivers.
Starting with the high--side MOSFET, the power
dissipation can be approximated from:
P
D_HS
= P
COND
+ P
SW_TOT
(eq. 21)
P
COND
= Conduction losses
P
D_HS
= Power losses in the high side MOSFET
P
SW_TOT
= Total switching losses
The first term in Equation 21 is the conduction loss of the
high--side MOSFET while it is on.
P
COND
=
I
RMS_HS
2
R
DS(on)_HS
(eq. 22)
I
RMS_HS
= RMS current in the high side MOSFET
R
DS(ON)_HS
= On resistance of the high side MOSFET
P
COND
= Conduction power losses
Using the ra term from Equation 5, I
RMS
becomes:
I
RMS_HS
= I
OUT
D
1 +
ra
2
12
(eq. 23)
D = Duty ratio
ra = Ripple current ratio
I
OUT
= Output current
I
RMS_HS
= High side MOSFET RMS current
The second term from Equation 21 is the total switching loss
and can be approximated from the following equations.
P
SW_TOT
= P
SW
+ P
DS
+ P
RR
(eq. 24)
P
DS
= High side MOSFET drain to source
losses
P
RR
= High side MOSFET reverse recovery
losses
P
SW
= High side MOSFET switching losses
P
SW_TOT
= High side MOSFET total switching
losses
The first term for total switching losses from Equation 24
are the losses associated with turning the high--side
MOSFET on and off and the corresponding overlap in drain
voltage and current.
P
SW
= P
TON
+ P
TOFF
(eq. 25)
=
1
2
I
OUT
V
IN
F
SW
t
RISE
+ t
FALL
F
SW
= Switching frequency
I
OUT
= Load current
P
SW
= High side MOSFET switching losses
P
TON
= T urn on power losses
P
TOFF
= T urn off power losses
t
FALL
= MOSFET fall time
t
RISE
= MOSFET rise time
VCC = Input voltage

NCP3102CMNTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators INTEGRATED SWITCHER
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