MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22053
TRANSFER-MOLD TYPE
INSULATED TYPE
May 2005
Fig. 8 AN EXAMPLE OF TYPICAL DIP-IPM APPLICATION CIRCUT WITH 1 SHUNT RESISTOR
HO
HO
DIP-IPM
C3
C3
C3
C2
C2
C2
C1
C1
C1
HO
IN
IN
15V line
5V line
IN
COM
COM
COM
UOUT
VOUT
WOUT
WVNO
VVNO
UVNO
CFO
GND
Fo
W
N
VN
VCC
C
B
A
C4(C
FO)
CFO
R1
N1
C5
CIN
CIN
W
V
U
P
VS
VS
VS
VB
VB
VB
VCC
VCC
VCC
Fo
W
N
VN
UN
UN
WP
VP
UP
VNC
VN1
VP1
VPC
VP1
VP1
VWFS
VVFS
VUFS
VWFB
VVFB
VUFB
M
C3
MCU
HVIC1
HVIC2
HVIC3
LVIC
NW
NV
NU
If this wiring is too
long, short circuit
might be caused.
Shunt
resistor
If this wiring is too long, the SC level fluctuation
might be larger and cause SC malfunction.
The long wiring of GND might generate noise
on input and cause IGBT to be malfunction.
C1:Tight tolerance temp-compensated electrolytic type
C2,C3: 0.1
~
0.22µF R-category ceramic capacitor for noise filtering.
(Note: The capacitance value depends on the PWM control used in the applied system.)
Shunt
resistor
Comparator
OR logic
circuit
+
–
Vref
R
P
U
Drive circuit
Drive circuit
Protection circuit
V
W
CIN
DIP-IPM
External protection circuit
C
+
–
Vref
R
C
+
–
Vref
R
C
H-side IGBT
S
L-side IGBT
S
V
NC
•
The time constant RC of external comparator should be selected in the range
of 1.5~2µs. SC interrupting time might vary with the wiring pattern.
•
The threshold voltage Vref should be set up the same rating of short circuit
trip level (V
SC
(ref) typ. 0.48V).
•
Please select the external shunt resistance such that the SC trip-level is less
than 1.7 times of the current rating.
•
To avoid malfunction, the wiring of each input should be as short as possible.
•
OR circuit output level should be set up the rating of short circuit trip level
(V
SC
(ref) typ. 0.48V).
•
For extra precaution, please refer to Fig.8
NW
NV
NU
Fig. 9 EXAMPLE OF EXTERNAL PROTECTION CIRCUIT WITH 3 SHUNT RESISTORS
Note 1: To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm)
2: By virtue of integrating HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible.
3: Fo output is open drain type. The signal line should be pulled up to the positive side of a 5V supply with an approximate 10kΩ resistor.
4: Fo output pulse width (t
FO) should be determined by connecting external capacitor C4 between CFO and VNC terminals. (Example :
t
FO=2.4ms(typ.) at CFO=22nF)
5: Input signal is High-Active type. There is a 2.5kΩ (Min.) resistor inside IC to pull down each input signal line to GND.
When employing RC coupling circuits at each input, set up RC couple such that input signal agree with turn-off/turn-on threshold voltage.
6: To prevent errors of the protection function, the wiring of A, B, C should be as short as possible.
7: The time constant R5C1 of the protection circuit should be selected in the range of 1.5~2µs. SC interrupting time might vary with the
wiring pattern.
8: All capacitors should be mounted as close to the terminals of the DIP-IPM as possible.
9: To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 terminals should be as short as possible.
Generally a 0.1~0.22µF snubber between the P&N1 terminals is recommended.
10: It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
11: To prevent LVIC from surge destruction, it is recommended to mount a fast recovery type diode between V
NC and NU, NV, NW
terminals.
