REV. 0
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which may result from its use. No license is granted by implication or
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a
AD9752*
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
12-Bit, 125 MSPS High Performance
TxDAC
®
D/A Converter
FUNCTIONAL BLOCK DIAGRAM
150pF
+1.20V REF
AVDD ACOM
REFLO
ICOMP
CURRENT
SOURCE
ARRAY
+5V
SEGMENTED
SWITCHES
LSB
SWITCHES
REFIO
FS ADJ
DVDD
DCOM
CLOCK
+5V
R
SET
0.1mF
CLOCK
IOUTA
IOUTB
0.1mF
LATCHES
AD9752
SLEEP
DIGITAL DATA INPUTS (DB11–DB0)
FEATURES
High Performance Member of Pin-Compatible
TxDAC Product Family
125 MSPS Update Rate
12-Bit Resolution
Excellent Spurious Free Dynamic Range Performance
SFDR to Nyquist @ 5 MHz Output: 79 dBc
Differential Current Outputs: 2 mA to 20 mA
Power Dissipation: 185 mW @ 5 V
Power-Down Mode: 20 mW @ 5 V
On-Chip 1.20 V Reference
CMOS-Compatible +2.7 V to +5.5 V Digital Interface
Package: 28-Lead SOIC and TSSOP
Edge-Triggered Latches
APPLICATIONS
Wideband Communication Transmit Channel:
Direct IF
Basestations
Wireless Local Loop
Digital Radio Link
Direct Digital Synthesis (DDS)
Instrumentation
PRODUCT DESCRIPTION
The AD9752 is a 12-bit resolution, wideband, second generation
member of the TxDAC series of high performance, low power
CMOS digital-to-analog-converters (DACs). The TxDAC
family,
which consists of pin compatible 8-, 10-, 12-, and 14-bit DACs, is
specifically optimized for the transmit signal path of communica-
tion systems. All of the devices share the same interface options,
small outline package and pinout, thus providing an upward or
downward component selection path based on performance,
resolution and cost. The AD9752 offers exceptional ac and dc
performance while supporting update rates up to 125 MSPS.
The AD9752’s flexible single-supply operating range of 4.5 V to
5.5 V and low power dissipation are well suited for portable and
low power applications. Its power dissipation can be further
reduced to a mere 65 mW, without a significant degradation in
performance, by lowering the full-scale current output. Also, a
power-down mode reduces the standby power dissipation to
approximately 20 mW.
The AD9752 is manufactured on an advanced CMOS process.
A segmented current source architecture is combined with a
proprietary switching technique to reduce spurious components
and enhance dynamic performance. Edge-triggered input latches
and a 1.2 V temperature compensated bandgap reference have
been integrated to provide a complete monolithic DAC solution.
The digital inputs support +2.7 V to +5 V CMOS logic families.
The AD9752 is a current-output DAC with a nominal full-scale
output current of 20 mA and > 100 k output impedance.
Differential current outputs are provided to support single-
ended or differential applications. Matching between the two
current outputs ensures enhanced dynamic performance in a
differential output configuration. The current outputs may be
tied directly to an output resistor to provide two complemen-
tary, single-ended voltage outputs or fed directly into a trans-
former. The output voltage compliance range is 1.25 V.
The on-chip reference and control amplifier are configured for
maximum accuracy and flexibility. The AD9752 can be driven
by the on-chip reference or by a variety of external reference
voltages. The internal control amplifier, which provides a wide
(>10:1) adjustment span, allows the AD9752 full-scale current
to be adjusted over a 2 mA to 20 mA range while maintaining
excellent dynamic performance. Thus, the AD9752 may oper-
ate at reduced power levels or be adjusted over a 20 dB range to
provide additional gain ranging capabilities.
The AD9752 is available in 28-lead SOIC and TSSOP packages.
It is specified for operation over the industrial temperature range.
PRODUCT HIGHLIGHTS
1. The AD9752 is a member of the wideband TxDAC
product
family that provides an upward or downward component selec-
tion path based on resolution (8 to 14 bits), performance and
cost. The entire family of TxDACs is available in industry
standard pinouts.
2. Manufactured on a CMOS process, the AD9752 uses a
proprietary switching technique that enhances dynamic
performance beyond that previously attainable by higher
power/cost bipolar or BiCMOS devices.
3. On-chip, edge-triggered input CMOS latches interface readily
to +2.7 V to +5 V CMOS logic families. The AD9752 can
support update rates up to 125 MSPS.
4. A flexible single-supply operating range of 4.5 V to 5.5 V and
a wide full-scale current adjustment span of 2 mA to 20 mA
allow the AD9752 to operate at reduced power levels.
5. The current output(s) of the AD9752 can be easily config-
ured for various single-ended or differential circuit topologies.
TxDAC is a registered trademark of Analog Devices, Inc.
*Protected by U.S. Patents Numbers 5450084, 5568145, 5689257, 5612697 and
5703519.
AD9752* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
AD9752 Evaluation Board
DOCUMENTATION
Application Notes
AN-237: Choosing DACs for Direct Digital Synthesis
AN-320A: CMOS Multiplying DACs and Op Amps Combine
to Build Programmable Gain Amplifier, Part 1
AN-595: Understanding Pin Compatibility in the TxDAC®
Line of High Speed D/A Converters
AN-912: Driving a Center-Tapped Transformer with a
Balanced Current-Output DAC
Data Sheet
AD9752: 12-Bit, 125 MSPS High Performance TxDAC® D/A
Converter Data Sheet
TOOLS AND SIMULATIONS
AD9752 IBIS Models
REFERENCE MATERIALS
Informational
Advantiv™ Advanced TV Solutions
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
AD9752 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD9752 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
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–2–
AD9752–SPECIFICATIONS
REV. 0
(T
MIN
to T
MAX
, AVDD = +5 V, DVDD = +5 V, I
OUTFS
= 20 mA, unless otherwise noted)
DC SPECIFICATIONS
Parameter Min Typ Max Units
RESOLUTION 12 Bits
DC ACCURACY
1
Integral Linearity Error (INL)
T
A
= +25°C –1.5 ±0.5 +1.5 LSB
T
MIN
to T
MAX
–2.0 +2.0 LSB
Differential Nonlinearity (DNL)
T
A
= +25°C –0.75 ±0.25 +0.75 LSB
T
MIN
to T
MAX
–1.0 +1.0 LSB
ANALOG OUTPUT
Offset Error –0.02 +0.02 % of FSR
Gain Error
(Without Internal Reference) –2 ±0.5 +2 % of FSR
Gain Error
(With Internal Reference) –5 ±1.5 +5 % of FSR
Full-Scale Output Current
2
2.0 20.0 mA
Output Compliance Range –1.0 1.25 V
Output Resistance 100 k
Output Capacitance 5 pF
REFERENCE OUTPUT
Reference Voltage 1.14 1.20 1.26 V
Reference Output Current
3
100 nA
REFERENCE INPUT
Input Compliance Range 0.1 1.25 V
Reference Input Resistance 1 M
Small Signal Bandwidth 0.5 MHz
TEMPERATURE COEFFICIENTS
Offset Drift 0 ppm of FSR/°C
Gain Drift
(Without Internal Reference) ±50 ppm of FSR/°C
Gain Drift
(With Internal Reference) ±100 ppm of FSR/°C
Reference Voltage Drift ±50 ppm/°C
POWER SUPPLY
Supply Voltages
AVDD 4.5 5.0 5.5 V
DVDD 2.7 5.0 5.5 V
Analog Supply Current (I
AVDD
)
4
34 39 mA
Digital Supply Current (I
DVDD
)
5
35mA
Supply Current Sleep Mode (I
AVDD
)
6
48mA
Power Dissipation
5
(5 V, I
OUTFS
= 20 mA) 185 220 mW
Power Supply Rejection Ratio
7
—AVDD –0.4 +0.4 % of FSR/V
Power Supply Rejection Ratio
7
—DVDD –0.025 +0.025 % of FSR/V
OPERATING RANGE –40 +85 °C
NOTES
1
Measured at IOUTA, driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32 × the I
REF
current.
3
Use an external buffer amplifier to drive any external load.
4
Requires +5 V supply.
5
Measured at f
CLOCK
= 25 MSPS and I
OUT
= static full scale (20 mA).
6
Logic level for SLEEP pin must be referenced to AVDD. Min V
IH
= 3.5 V.
7
±5% Power supply variation.
Specifications subject to change without notice.

AD9752ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 12-Bit 100 MSPS
Lifecycle:
New from this manufacturer.
Delivery:
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