ADDI7100 Data Sheet
Rev. D | Page 16 of 20
SERIAL INTERFACE TIMING
All ADDI7100 internal registers are accessed through a 3-wire
serial interface. Each register consists of an 8-bit address and
a 16-bit data-word. Both the address and the data-word are
written starting with the LSB. To write to each register, a 24-bit
operation is required, as shown in Figure 16. Although many
data-words are fewer than 16 bits wide, all 16 bits must be written
for each register. For example, if the data-word is only eight bits
wide, the upper eight bits are don’t care bits and must be filled
with zeros during the serial write operation. If fewer than 16 data
bits are written, the register is not updated with new data.
Figure 17 shows a more efficient way to write to the registers,
using the ADDI7100 address autoincrement capability. Using
this method, the lowest desired address is written first, followed
by multiple 16-bit data-words. Each data-word is automatically
written to the address of the next highest register. By eliminating
the need to write each address, faster register loading is achieved.
Continuous write operations can start with any register location.
07608-019
A2
SDATA
A0 A1 A4 A5 A6 A7
D0
D1 D2 D3 D13 D14 D15
SL
A3
t
LS
8-BIT ADDRESS 16-BIT DATA
244 5 6 7 8 9 10 11 12 22 23
t
LH
t
DH
t
DS
NOTES
1. SDATA BITS ARE LATCHED ON SCK RISING EDGES. SCK CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.
2. ALL 24 BITS MUST BE WRITTEN: 8 BITS FOR ADDRESS AND 16 BITS FOR DATA.
3. IF THE REGISTER LENGTH IS LESS THAN 16 BITS, THEN ZEROS MUST BE USED TO COMPLETE THE 16-BIT
DATA LENGTH.
4. NEW DATA VALUES ARE UPDATED IN THE SPECIFIED REGISTER LOCATION AT DIFFERENT TIMES, DEPENDING ON
THE PARTICULAR REGISTER WRITTEN TO.
SCK
123
Figure 16. Serial Write Operation
NOTES
1. MULTIPLE SEQUENTIAL REGISTERS CAN BE LOADED CONTINUOUSLY.
2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 16-BIT DATA-WORDS.
3. THE ADDRESS AUTOMATICALLY INCREMENTS WITH EACH 16-BIT DATA-WORD (ALL 16 BITS MUST BE WRITTEN).
4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED.
07608-020
SDATA
A0 A1 A2 A6 A7 D0 D1 D14 D15
SCK
SL
A3
D0 D1 D14 D15 D0
DATA FOR STARTING
REGISTER ADDRESS
DATA FOR NEXT
REGISTER ADDRESS
D2D1
1 24234 78910 23
2625 4039
42
41
43
Figure 17. Continuous Serial Write Operation
