STMPE812ABJR Datasheet STMPE812ABJR | P7-P9

AN3301 Hardware

Doc ID 18161 Rev 1 7/35

1.3 Power modes transition

The following table highlights the states of touchscreen FIFO, GPIO, Interrupt and PWM

during the various power modes:

– Active mode

– Hibernation mode

– Reset

Hibernation mode is entered automatically when ALL of the following listed activities are

met:

● Absent of I

C transaction with valid STMPE812A slave address for 10 ms

● PWM disabled

● ADC disabled

● Absent of GPIO input transition for 10 ms

● Absent of touchsceen or pen down interrupt for 10 ms

Table 1. Power modes vs. touchscreen/GPIO/Interrupt/PWM data

Description Active mode Hibernation mode

Reset (HW, SW, POR

and General call)

Touchscreen FIFO data Active Sustained Cleared

GPIO configuration, pin

state and data

Active Sustained Cleared

Interrupt configuration

and data

Active Sustained Cleared

PWM configuration and

data

Active Sustained Cleared

Hardware AN3301

8/35 Doc ID 18161 Rev 1

1.4 Touchscreen tracks

The touchscreen tracks (X+, X-, Y+, Y-) are sensitive lines. Noise may be captured by the

touchscreen tracks if the line is too long and if placed nearby noisy lines, for example the

digital data lines and the I2C/SPI lines.

Although there is no recommended standard for track sizes, tracks that are too long reduce

the resolution of the touchscreen controller. As a matter of fact, long tracks introduce a

voltage drop during the measurement cycle at the terminal of the touchscreen panel.

1.4.1 Track resistance

Any track has a certain amount of resistance, thus reducing the effective resolution of the

touchscreen controller.

During the measurement, the current flows to the touchscreen panel through the tracks. If

the resistance is too high, the voltage in the panel terminal is no longer at the same level as

VIO and GND.

From Figure 2 it can be seen that, during the measurement cycle, the device bias the

touchscreen panel with the VIO voltage. Due to the track resistance, the voltage at panel's

terminals is:

Equation 1

Hence, the effective resolution is reduced by the same factor as well. The track resistance

may be reduced by designing the track as short as possible with a reasonable width.

Figure 2. Track resistance

Vx V

R1 R2 Rx++()⁄⋅=

AM004193V2

Track resistance, R1

To uch panel

resistance, Rx

Track resistance, R2

VIO

GND

AN3301 Hardware

Doc ID 18161 Rev 1 9/35

1.5 Noise prevention

Noise may be coupled to the tracks connecting the touchscreen and this should be

prevented as much as possible.

Two practices may be applied:

1. Prevent the tracks overlap with other noisy signal tracks, such as I2C/SPI lines and

digital data lines. If the overlap is not avoidable, GND lines separation between

touchscreen lines and noisy lines is recommended (in more than 2 layers PCB).

2. Put GND shielding at each side of touchscreen tracks routing.

Figure 3. Noise prevention

1.6 Noise filtering

A filtering capacitor can be placed on the touchscreen tracks to further suppress the noise.

In this case, the best location for the filtering capacitor is as near as possible to the

STMPE812A sense pins (X+, X-, Y+, Y-).

The values recommended for the filtering capacitor are:

1. 1-2 nF for an LCD less than 6 inches

2. 5-10 nF for an LCD bigger than 6 inches

The Settling time and Touch detect delay registers must be set correctly to adapt to the

filtering capacitor, otherwise the touchscreen controller may not work properly. Additional

information is found in the STMPE812A datasheet.

AM004194V2

TSC tracks

Top Layer

Noisy tracks

Bottom Layer

TSC

GND

Other

Noisy line

GNDGND

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P33 P34-P35

STMPE812ABJR

Mfr. #:

Buy STMPE812ABJR

Manufacturer:

STMicroelectronics

Description:

Touch Screen Controllers Touchscreen cntrlr S-Touch

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STMPE812ABJR