SL28PCIe26
DOC#: SP-AP-0774 (Rev. 0.2) Page 4 of 14
Control Registers
28 Acknowledge from slave 27:21 Slave address–7 bits
29 Stop 28 Read
29 Acknowledge from slave
37:30 Data from slave–8 bits
38 NOT Acknowledge
39 Stop
Byte 0: Control Register 0
Bit @Pup Name Description
7 1 RESERVED RESERVED
6 0 RESERVED RESERVED
5 1 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 1 PD_Restore Save configuration when PD# is asserted
0 = Config. cleared, 1 = Config. saved
Table 3. Byte Read and Byte Write Protocol
Byte 1: Control Register 1
Bit @Pup Name Description
7 1 RESERVED RESERVED
6 0 PLL1_SS_DC Select for down or center SS
0 = -0.5% Down spread, 1 = +/-0.5% Center spread
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 1 RESERVED RESERVED
1 0 RESERVED RESERVED
0 1 RESERVED RESERVED
Byte 2: Control Register 2
Bit @Pup Name Description
7 1 RESERVED RESERVED
6 1 RESERVED RESERVED
5 1 RESERVED RESERVED
4 1 RESERVED RESERVED
3 1 RESERVED RESERVED
2 1 RESERVED RESERVED
1 1 RESERVED RESERVED
0 1 RESERVED RESERVED
Byte 3: Control Register 3
Bit @Pup Name Description
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DOC#: SP-AP-0774 (Rev. 0.2) Page 5 of 14
7 1 RESERVED RESERVED
6 1 RESERVED RESERVED
5 1 RESERVED RESERVED
4 1 RESERVED RESERVED
3 1 RESERVED RESERVED
2 1 RESERVED RESERVED
1 1 RESERVED RESERVED
0 1 RESERVED RESERVED
Byte 3: Control Register 3
Byte 4: Control Register 4
Bit @Pup Name Description
7 1 RESERVED RESERVED
6 1 SRC0_OE Output enable for SRC0
0 = Output Disabled, 1 = Output Enabled
5 1 SRC1_OE Output enable for SRC1
0 = Output Disabled, 1 = Output Enabled
4 0 RESERVED RESERVED
3 1 SRC3_OE Output enable for SRC3
0 = Output Disabled, 1 = Output Enabled
2 1 SRC2_OE Output enable for SRC2
0 = Output Disabled, 1 = Output Enabled
1 0 PLL1_SS_EN Enable PLL1s spread modulation,
0 = Spread Disabled, 1 = Spread Enabled
0 1 RESERVED RESERVED
Byte 5: Control Register 5
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 6: Control Register 6
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
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DOC#: SP-AP-0774 (Rev. 0.2) Page 6 of 14
Byte 7: Vendor ID
Bit @Pup Name Description
7 0 Rev Code Bit 3 Revision Code Bit 3
6 1 Rev Code Bit 2 Revision Code Bit 2
5 0 Rev Code Bit 1 Revision Code Bit 1
4 0 Rev Code Bit 0 Revision Code Bit 0
3 1 Vendor ID bit 3 Vendor ID Bit 3
2 0 Vendor ID bit 2 Vendor ID Bit 2
1 0 Vendor ID bit 1 Vendor ID Bit 1
0 0 Vendor ID bit 0 Vendor ID Bit 0
Byte 8: Control Register 8
Bit @Pup Name Description
7 1 Device_ID3 RESERVED
6 0 Device_ID2 RESERVED
5 0 Device_ID1 RESERVED
4 0 Device_ID0 RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 9: Control Register 9
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 1 RESERVED RESERVED
4 0 TEST _MODE_SEL Test mode select either REF/N or tri-state
0 = All outputs tri-state, 1 = All output REF/N
3 0 TEST_MODE_ENTRY Allows entry into test mode
0 = Normal Operation, 1 = Enter test mode(s)
2 1 I2C_VOUT<2> Amplitude configurations differential clocks
I2C_VOUT[2:0]
000 = 0.30V
001 = 0.40V
010 = 0.50V
011 = 0.60V
100 = 0.70V
101 = 0.80V (default)
110 = 0.90V
111 = 1.00V
1 0 I2C_VOUT<1>
0 1 I2C_VOUT<0>
Byte 10: Control Register 10
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED

SL28PCIe26ALCT

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Generators & Support Products PCIe clock g., Xin(25M) -->4 PCIe out (gen.3)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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