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74HC4017N,652

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 10 December 2013 10 of 24
NXP Semiconductors 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
t
su
set-up time CP1toCP0; CP0 to CP1;
see Figure 8
V
CC
= 2.0 V 50 8 - 65 - 75 - ns
V
CC
= 4.5 V 10 3 - 13 - 15 - ns
V
CC
= 6.0 V 9 2- 11 - 13 -ns
t
h
hold time CP1toCP0; CP0 to CP1;
see Figure 8
V
CC
= 2.0 V 50 17 - 65 - 75 - ns
V
CC
= 4.5 V 10 6 - 13 - 15 - ns
V
CC
= 6.0 V 9 5 - 11 - 13 - ns
t
rec
recovery time MR to CP0 and
MR to CP
1; see Figure 9
V
CC
= 2.0 V 5 17 - 5 - 5 - ns
V
CC
= 4.5 V 5 6- 5 - 5 -ns
V
CC
= 6.0 V 5 5- 5 - 5 -ns
f
max
maximum
frequency
CP0 or CP1; see Figure 9
V
CC
= 2.0 V 6.0 23 - 4.8 - 4.0 - MHz
V
CC
= 4.5 V 30 70 - 24 - 20 - MHz
V
CC
= 5.0 V;
C
L
=15pF
-77- - - - -MHz
V
CC
= 6.0 V 25 83 - 28 - 24 - MHz
C
PD
power
dissipation
capacitance
V
I
= GND to V
CC
;
V
CC
=5V; f
i
=1MHz
[3]
-35- - - - -pF
74HCT4017
t
pd
propagation
delay
CP0 to Qn; CP0 to Q5-9;
see Figure 10
[1]
V
CC
= 4.5 V - 25 46 - 58 - 69 ns
V
CC
= 5.0 V;
C
L
=15pF
-21- - - - -ns
CP
1 to Qn; CP1 to Q5-9;
see Figure 10
V
CC
= 4.5 V - 25 50 - 63 - 75 ns
V
CC
= 5.0 V;
C
L
=15pF
-21- - - - -ns
t
PHL
HIGH to LOW
propagation
delay
MR to Q[1:9];
see Figure 10
V
CC
= 4.5 V - 22 46 - 58 - 69 ns
t
PLH
LOW to HIGH
propagation
delay
MR to Q5-9, Q0;
see Figure 10
V
CC
= 4.5 V - 20 46 - 58 - 69 ns
Table 7. Dynamic characteristics …continued
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF; see Figure 11.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 10 December 2013 11 of 24
NXP Semiconductors 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] t
t
is the same as t
THL
and t
TLH
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
t
t
transition time see Figure 10
[2]
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
t
W
pulse width CP0 and CP1 (HIGH or
LOW); see Figure 9
V
CC
= 4.5 V 16 7 - 20 - 24 - ns
MR (HIGH); see Figure 9
V
CC
= 4.5 V 16 4 - 20 - 24 - ns
t
su
set-up time CP1toCP0; CP0 to CP1;
see Figure 8
V
CC
= 4.5 V 10 3 - 13 - 15 - ns
t
h
hold time CP1toCP0; CP0 to CP1;
see Figure 8
V
CC
= 4.5 V 10 6 - 13 - 15 - ns
t
rec
recovery time MR to CP0 and
MR to CP1; see Figure 9
V
CC
= 4.5 V 5 5- 5 - 5 -ns
f
max
maximum
frequency
CP0 or CP1; see Figure 9
V
CC
= 4.5 V 30 61 - 24 - 20 - MHz
V
CC
= 5.0 V;
C
L
=15pF
-67- - - - -MHz
C
PD
power
dissipation
capacitance
V
I
= GND to V
CC
1.5 V;
V
CC
=5V; f
i
=1MHz
[3]
-36- - - - -pF
Table 7. Dynamic characteristics …continued
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF; see Figure 11.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 10 December 2013 12 of 24
NXP Semiconductors 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
11. Waveforms
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 8. Waveforms showing the set-up and hold times for CP0 to CP1 and CP1 to CP0
t
h
t
su
CP0 input
GND
GND
CP1 input
V
M
V
I
V
I
t
h
t
su
V
M
001aah245
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 9. Waveforms showing the minimum pulse width for CP0, CP1 and MR input; the maximum frequency for
CP0 and CP1 input; the recovery time for MR and the MR input to Qn and Q5-9 output propagation delays
CP0 input
V
I
GND
V
I
GND
V
I
GND
V
OH
V
OL
V
OH
V
OL
Q1 - Q9
output
MR input
CP1 input
V
M
V
M
1/f
max
t
W
t
W
t
rec
V
M
1/f
max
t
W
t
PLH
t
PHL
V
M
V
M
001aah246
Q0, Q5 - Q9
output
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

74HC4017N,652

Mfr. #:
Buy 74HC4017N,652
Manufacturer:
NXP Semiconductors
Description:
Counter ICs 5ST JOHNSON COUNTER 10 DECODED OUTPUTS
Lifecycle:
New from this manufacturer.
Delivery:
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