NCV7704, NCV7714
www.onsemi.com
17
Current Sensing
Current Sense Output / PWM2 Input (Bidirectional Pin
ISOUT/PWM2)
The current sense output allows a more precise analysis of
the actual state of the load rather than the basic detection of
an under− or overload condition. The sense output provides
an image of the actual load current at the selected high side
driver transistor. The current monitor function is available
for the high current high−side output (OUT7) as well as for
the all bulb and LED outputs (OUT4−6).
The current sense ratio is fixed to 1/10000 for the low
resistance outputs OUT4 (bulb mode) and OUT7 and for the
high ohmic outputs OUT5/6 and OUT4 (LED mode) to
1/2000. To prevent from false readouts, the signal at pin
ISOUT is blanked after switching on the driver until correct
settlement of the circuitry (max. 65 ms). Bits
CONTROL_3.IS[3:0] are used to select the output to be
multiplexed to the current sense output.
The NCV7704/NCV7714 provides a sample−and−hold
functionality for the current sense output to enable precise
and simple load current diagnostics even during PWM
operation of the respective output. While in active high−side
output state, the current provided at ISOUT reflects a
(low−pass−filtered) image of the actual output current, the
IS−output current is sampled and held constant as soon as the
HS output transistor is commanded off via PWM
(high−impedance). In case no previous current information
is available in the Sample−and−hold stage (current sense
channel changed while actual channel is commanded off)
the sample stage is reset so that it reflects zero output current.
Electro Chromic Mirror (NCV7714 ONLY)
Controller for Electro−chromic Glass
The voltage of the electro−chromic element connected at
pin ECFB can be controlled to a target value which is set by
Control Register 1 (bits CONTROL_1.DAC[5:0]). Setting
bit CONTROL_1.ECEN enables this function. At the same
time OUT6 is enabled, regardless of its own control bit
CONTROL_1.HS6 and the respective PWM setting. An
on−chip differential amplifier is used to control an external
logic−level N−MOS pass device that delivers the power to
the electro−chromic element. The target voltage at ECFB is
binary coded with a selectable full scale range (bit
CONTROL_2.FSR). The default clamping value for the
output voltage (CONTROL_2.FSR = 0) is 1.2 V, by setting
CONTROL_2.FSR to “1”, the maximum output voltage is
1.5 V. The resolution of the DAC output voltage is
independent of the full−scale−range selection.
The charging of the mirror (positive slope) is determined
by the positive slew rate of the transconductance amplifier
and the compensation capacitor, while in case of capacitive
loads, the negative slope is mainly determined by the current
consumption thru the load and its capacitance. To allow fast
settling time changing from higher to lower output voltage
values, the device provides two modes of operation:
1. Fast discharge: When the target output voltage is
set to 0 V and bit CONTROL_1.LS_ECFB is set,
the voltage at pin ECFB is pulled to ground by a
1.6 W low−side switch.
2. PWM discharge: In case of PWM discharge being
activated (CONFIG.ECM_LSPWM = 1 and
CONTROL_1.LS_ECFB = 1) (Figure 6):
a. The circuit regulation starts in normal
regulation. The DAC value is turned to new
lower value.
b. If the loop is detected out of regulation for a
time longer than t_rec (~3 ms), the ECON
voltage is detected low (internal signal
ECON_LOW = 1), the regulator is switched off
(DAC voltage at 0) and the fast discharge
transistor is activated for ~300 ms (t_disc).
During this fast discharge, the ECON output is
pulled low to prevent from shoot−thru currents.
c. At the end of the discharge pulse t_disc the fast
discharge is switched off and the regulation
loop is activated again (with DAC to the correct
wanted value), so the loop goes back to step b.)
and the ECON_LOW comparator is observed
again. Before starting a discharge pulse, the
ECLO and ECHI comparator data is latched.
The feedback loop out of regulation is monitored by
comparing V(ECON) versus V(ECFB) and versus 400 mV.
If the regulation is activated and ECON is below ECFB, or
below 400 mV, then the loop is detected as out of regulation
and internal signal ECON_LOW is made 1. By activating
the PWM discharge feature, the overcurrent recovery
function is automatically disabled, regardless of the setting
in CONTROL_2.OC_ECFB.
