CY7C199D
Document Number: 38-05471 Rev. *L Page 4 of 15
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature ................................ –65 C to +150 C
Ambient temperature with
power applied .......................................... –55 C to +125 C
Supply voltage on
V
CC
to relative GND
[1]
................................–0.5 V to +6.0 V
DC voltage applied to outputs
in high Z State
[1]
................................ –0.5 V to V
CC
+ 0.5 V
DC input voltage
[1]
............................. –0.5 V to V
CC
+ 0.5 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(per MIL-STD-883, method 3015) ........................ > 2,001 V
Latch-up current ................................................... > 140 mA
Operating Range
Range Ambient Temperature V
CC
Speed
Industrial –40 C to +85 C5 V 0.5 V 10 ns
Electrical Characteristics
Over the operating range
Parameter Description Test Conditions
CY7C199D-10
Unit
Min Max
V
OH
Output HIGH voltage I
OH
= –4.0 mA 2.4 V
I
OH
= –0.1mA 3.4
[2]
V
OL
Output LOW voltage I
OL
= 8.0 mA 0.4 V
V
IH
Input HIGH voltage
[1]
2.2 V
CC
+ 0.5 V
V
IL
Input LOW voltage
[1]
–0.5 0.8 V
I
IX
Input leakage current GND < V
I
< V
CC
–1 +1 µA
I
OZ
Output leakage current GND < V
O
< V
CC
, output disabled –1 +1 µA
I
CC
V
CC
operating supply current V
CC
= V
CC(max)
, I
OUT
= 0 mA,
f = f
max
= 1/t
RC
100 MHz 80 mA
83 MHz 72 mA
66 MHz 58 mA
40 MHz 37 mA
I
SB1
Automatic CE power-down
current – TTL Inputs
V
CC
= V
CC(max)
, CE > V
IH
,
V
IN
> V
IH
or V
IN
< V
IL
, f = f
max
–10mA
I
SB2
Automatic CE power-down
current – CMOS Inputs
V
CC
= V
CC(max)
, CE > V
CC
– 0.3 V,
V
IN
> V
CC
– 0.3 V or V
IN
< 0.3 V, f = 0
–3mA
Note
1. V
IL(min)
= –2.0 V and V
IH(max)
= V
CC
+ 1 V for pulse durations of less than 5 ns.
2. Please note that the maximum V
OH
limit does not exceed minimum CMOS V
IH
of 3.5 V. If you are interfacing this SRAM with 5 V legacy processors that require a
minimum V
IH
of 3.5 V, please refer to Application Note AN6081 for technical details and options you may consider.
CY7C199D
Document Number: 38-05471 Rev. *L Page 5 of 15
Capacitance
Parameter
[3]
Description Test Conditions Max Unit
C
IN
Input capacitance T
A
= 25 C, f = 1 MHz, V
CC
= 5.0 V 8 pF
C
OUT
Output capacitance 8pF
Thermal Resistance
Parameter
[3]
Description Test Conditions 28-pin SOJ 28-pin TSOP I Unit
JA
Thermal resistance
(junction to ambient)
Still air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
59.16 54.65 C/W
JC
Thermal resistance
(junction to case)
40.84 21.49 C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
[4]
R2
R1 480
3.0 V
GND
90%
10%
90%
10%
5 V
OUTPUT
5pF
INCLUDING
ALL INPUT PULSES
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
30 pF*
OUTPUT
Z = 50
50
1.5 V
(a)
(c)
High Z characteristics:
255
JIG AND SCOPE
(b)
Rise Time: 3 ns
Fall Time: 3 ns
CY7C199D
Document Number: 38-05471 Rev. *L Page 6 of 15
Data Retention Characteristics
Over the operating range
Parameter Description Conditions Min Max Unit
V
DR
V
CC
for data retention 2.0 V
I
CCDR
Data retention current V
CC
= V
DR
= 2.0 V, CE > V
CC
– 0.3 V,
V
IN
> V
CC
– 0.3 V or V
IN
< 0.3 V
–3mA
t
CDR
[5]
Chip deselect to data retention
time
0–ns
t
R
[6]
Operation recovery time 15 ns
Data Retention Waveform
Figure 4. Data Retention Waveform
4.5 V4.5 V
t
CDR
V
DR
> 2 V
DATA RETENTION MODE
t
R
CE
V
CC
Notes
5. Tested initially and after any design or process changes that may affect these parameters.
6. Full device operation requires linear V
CC
ramp from V
DR
to V
CC(min)
> 50 µs or stable at V
CC(min)
> 50 µs.

CY7C199D-10VXI

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM 256Kb 10ns 32K x 8 SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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