74LVCH162374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 22 January 2013 9 of 17
NXP Semiconductors
74LVCH162374A
16-bit edge-triggered D-type flip-flop; 30 resistors; 3-state
[1] Typical values are measured at T
amb
=25C and V
CC
= 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts
N = number of inputs switching
(C
L
V
CC
2
f
o
) = sum of the outputs
11. AC waveforms
f
max
maximum
frequency
see Figure 6
V
CC
= 1.65 V to 1.95 V 100 - - 80 - MHz
V
CC
= 2.3 V to 2.7 V 125 - - 100 - MHz
V
CC
= 2.7 V 150 - - 120 - MHz
V
CC
= 3.0 V to 3.6 V 150 330 - 120 - MHz
t
sk(o)
output skew time V
CC
= 3.0 V to 3.6 V
[3]
- - 1.0 - 1.5 ns
C
PD
power dissipation
capacitance
per input; V
I
=GNDtoV
CC
[4]
V
CC
= 1.65 V to 1.95 V - 9.6 - - - pF
V
CC
= 2.3 V to 2.7 V - 11.7 - - - pF
V
CC
= 3.0 V to 3.6 V - 13.5 - - - pF
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter Conditions T
amb
= 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. Clock input (nCP) to output (nQn) propagation delay, the clock pulse width, and the maximum frequency
001aaa256
nCP input
nQn
output
t
PHL
t
PLH
t
W
V
OH
V
I
GND
V
OL
V
M
V
M
V
M
1/f
max
