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DG884DN

P1-P3P4-P6P7-P9P10-P12P13-P14
Vishay Siliconix
DG884
Document Number: 70071
S-71241–Rev. H, 25-Jun-07
www.vishay.com
1
8 x 4 Wideband Video Crosspoint Array
FEATURES
• Routes Any Input to Any Output
• Wide Bandwidth: 300 MHz
• Low Crosstalk: - 85 dB at 5 MHz
• Double Buffered TTL-Compatible
Latches with Readback
• Low r
DS(on)
: 45 Ω
• Optional Negative Supply
BENEFITS
• Reduced Board Space
• Improved System Bandwidth
• Improved Channel Off-Isolation
• Simplified Logic Interfacing
• Allows Bipolar Signal Swings
• Reduced Insertion Loss
• High Reliability
APPLICATIONS
• Wideband Signal Routing and Multiplexing
• High-End Video Systems
• NTSC, PAL, SECAM Switchers
• Digital Video Routing
• ATE Systems
DESCRIPTION
The DG884 contains a matrix of 32 T-switches configured in
an 8 x 4 crosspoint array. Any of the IN/OUT pins may be
used as an input or output. Any of the IN pins may be
switched to any or simultaneously to all OUT pins.
The DG884 is built on a proprietary D/CMOS process that
combines low capacitance switching DMOS FETs with low
power CMOS control logic and drivers. The ground lines
between adjacent signal input pins help to reduce crosstalk.
The low on-resistance and low on-capacitance of the DG884
make it ideal for video and wideband signal routing.
Control data is loaded individually into four Next Event
latches. When all Next Event latches have been
programmed, data is transferred into the Current Event
latches via a SALVO command. Current Event latch data
readback is available to poll array status.
Output disable capabilities make it possible to parallel
multiple DG884s to form larger switch arrays. DIS outputs
provide control signals used to place external buffers in a
power saving mode.
For additional information see applications note AN504
(FaxBack document number 70610).
FUNCTIONAL BLOCK DIAGRAM
* Pb containing terminations are not RoHS compliant, exemptions may apply
IN
1
IN
2
IN
3
IN
4
IN
5
IN
6
IN
7
IN
8
OUT
1
OUT
2
OUT
3
OUT
4
A
3
A
2
A
1
A
0
B
0
B
1
CS
WR
I/O
I
/O Control
Logic
Decode Logic, Switch Drivers
Current Event Latches
Next Event Latches
8 4 Switch Matrix
4 Disable Outputs
RS
SALVO
Available
Pb-free
RoHS*
COMPLIANT
www.vishay.com
2
Document Number: 70071
S-71241–Rev. H, 25-Jun-07
Vishay Siliconix
DG884
PIN CONFIGURATION AND ORDERING INFORMATION
All other states are not recommended.
IN
2
DGND
GND V
L
IN
3
RS
GND SALVO
IN
4
WR
GND A
3
IN
5
A
2
GND A
1
IN
6
A
0
GND CS
IN
7
I/O
PLCC and CLCC
6543214443424140
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
39
38
37
36
35
34
33
32
31
30
29
Top View
GNDGND
IN
8
GNDGND
GNDV
OUT
1
GND
2
OUT
3
GND
4
OUTV+
GND
0
OUT
1
1
1
2
3
4
IN
DIS
DIS
DIS
DIS
B
B
ORDERING INFORMATION
Temp Range Package Part Number
- 40 to 85 °C 44-Pin PLCC
DG884DN
DG884DN-E3
TRUTH TABLE I
RS I/O CS WR SALVO Actions
1 0 1 1 No change to Next Event latches
1 0 0 1 Next Event latches loaded as defined in table below
10001Next Event latches are transparent
1 0 0 1 Next Event data latched-in
10X1
Data in all Next Event latches is simultaneously loaded into the Current Event latches,
i.e., all new crosspoint addresses change simultaneously when SALVO
goes low
1 0 0 X 0 Current Event latches are transparent
1 0 X 1 Current Event data latched-in
10000Both next and Current Event latches are transparent
11111
A
0
, A
1
, A
2
, A
3
- High impedance
11011
A
0
, A
1
, A
2
, A
3
become outputs and reflect the contents of the Current Event latches
B
0
, B
1
determine which Current Event latches are being read
0 X X 1 1 All crosspoints opened (but data in Next Event latches is preserved)
Document Number: 70071
S-71241–Rev. H, 25-Jun-07
www.vishay.com
3
Vishay Siliconix
DG884
Notes:
When WR
= 0 Next Event latches are transparent. Each crosspoint is addressed individually, e.g., to connect IN
1
to OUT
1
thru OUT
4
requires
A
0
, A
1
, A
2
= 0 to be latched with each combination of B
0
, B
1
. When RS = 0, all four DIS outputs pull low simultaneously.
Notes:
a. All leads soldered or welded to PC Board.
b. Derate 6 mW/°C above 75 °C
c. Derate 16 mW/°C above 75 °C.
TRUTH TABLE II
WR
B
1
B
0
A
3
A
2
A
1
A
0
Next Event Latches
0
000 IN
1
to OUT
1
Loaded
001 IN
2
to OUT
1
Loaded
010 IN
3
to OUT
1
Loaded
011 IN
4
to OUT
1
Loaded
001100 IN
5
to OUT
1
Loaded
101 IN
6
to OUT
1
Loaded
110 IN
7
to OUT
1
Loaded
111 IN
8
to OUT
1
Loaded
0XXX Turn Off OUT
1
Loaded
000 IN
1
to OUT
2
Loaded
001 IN
2
to OUT
2
Loaded
010 IN
3
to OUT
2
Loaded
011 IN
4
to OUT
2
Loaded
011100 IN
5
to OUT
2
Loaded
101 IN
6
to OUT
2
Loaded
110 IN
7
to OUT
2
Loaded
111 IN
8
to OUT
2
Loaded
0XXX Turn Off OUT
2
Loaded
000 IN
1
to OUT
3
Loaded
001 IN
2
to OUT
3
Loaded
010 IN
3
to OUT
3
Loaded
011 IN
4
to OUT
3
Loaded
101100 IN
5
to OUT
3
Loaded
101 IN
6
to OUT
3
Loaded
110 IN
7
to OUT
3
Loaded
111 IN
8
to OUT
3
Loaded
0XXX Turn Off OUT
3
Loaded
000 IN
1
to OUT
4
Loaded
001 IN
2
to OUT
4
Loaded
010 IN
3
to OUT
4
Loaded
011 IN
4
to OUT
4
Loaded
111100 IN
5
to OUT
4
Loaded
101 IN
6
to OUT
4
Loaded
110 IN
7
to OUT
4
Loaded
111 IN
8
to OUT
4
Loaded
0XXX Turn Off OUT
4
Loaded
ABSOLUTE MAXIMUM RATINGS
Parameter Limit Unit
V+ to GND - 0.3 to 21
V
V+ to V- - 0.3 to 21
V- to GND - 10 to 0.3
V
L
to GND 0 to (V+) + 0.3
Digital Inputs
(V-) - 0.3 to (V
L
) + 0.3
or 20 mA, whichever occurs first
V
S
, V
D
(V-) - 0.3 to (V-) + 14
or 20 mA, whichever occurs first
Current (any terminal) Continuous 20
mA
Current (S or D) Pulsed 1 ms 10 % Duty 40
Storage Temperature
(A Suffix) - 65 to 150
°C
(D Suffix) - 65 to 125
Operating Temperature
(A Suffix) - 55 to 125
(D Suffix) - 40 to 85
Power Dissipation (Package)
a
44-Pin Quad J Lead PLCC
b
450
mW
44-Pin Quad J Lead Hermetic CLCC
c
1200
P1-P3P4-P6P7-P9P10-P12P13-P14

DG884DN

Mfr. #:
Buy DG884DN
Manufacturer:
Vishay / Siliconix
Description:
Analog & Digital Crosspoint ICs RECOMMENDED ALT 78-DG4051EEN-T1-GE4
Lifecycle:
New from this manufacturer.
Delivery:
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