LTC4309
1
4309fa
The LTC
®
4309 hot swappable 2-wire bus buffer allows
I/O card insertion into a live backplane without corrup-
tion of the data and clock busses. The LTC4309 provides
bidirectional buffering, keeping the backplane and card
capacitances isolated. Low offset and high V
OL
tolerance
allows cascading of multiple devices on the clock and data
busses. If SDAOUT or SCLOUT are low for 30ms, FAULT
will pull low indicating a stuck bus low condition. If DISCEN
is tied high, the LTC4309 will automatically break the bus
connection and generate up to 16 clock pulses and a stop
bit in an attempt to free the bus. A connection will resume
if the stuck bus is cleared. If DISCEN is connected to GND,
the busses will remain connected with no clock or stop
bit generation. ACC input enables rise-time accelerators
for high capacitively loaded busses.
During insertion, the SDA and SCL lines are precharged to
1V to minimize bus disturbances. When driven high, the
ENABLE input allows the LTC4309 to connect after a stop
bit or bus idle. Driving ENABLE low breaks the connection
between SDAIN and SDAOUT, SCLIN and SCLOUT. READY
is an open drain output which indicates that the backplane
and card sides are connected.
Level Shifting Low Offset Hot
Swappable 2-Wire Bus Buffer
with Stuck Bus Recovery
n
Live Board Insertion
n
Servers
n
Capacitance Buffer/Bus Extender
n
RAID Systems
n
ATCA
n
Bidirectional Buffer Increases Fanout
n
60mV Buffer Offset Independent of Load
n
Optional Disconnect when Bus is Stuck Low
n
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
n
Level Shift 2.5V, 3.3V and 5V Busses
n
Compatible with Non-Compliant V
OL
I
2
C Devices
n
±6kV Human Body Model ESD Ruggedness
n
Isolates Input SDA and SCL Lines from Output
n
Compatible with I
2
C™, I
2
C Fast-Mode and SMBus
n
READY Open Drain Output
n
FAULT Open Drain Output
n
1V Precharge on All SDA and SCL Lines
n
Optional Rise Time Accelerators
n
High Impedance SDA, SCL Pins for V
CC
= 0
n
Available in Small 12-Pin DFN (4mm x 3mm) and
16-Lead SSOP Packages
Rising Edge from Asserted Low
4309 TA01
ENABLEEN
SCLIN
SDAIN
SCL1
SDA1
FAULT
ACC
V
CC
GND
SCLOUT
SDAOUT
SCL2
SDA2
LTC4309
READY
3.3V
5V
3.3V
3.3V
10k
10k 10k
2.7k 2.7k
10k
ENABLE
V
CC2
V
CC2
SCLIN
CARD
CONNECTOR
BACKPLANE
CONNECTOR
SDAIN
FAULT
ACC
V
CC
GND
SCLOUT
SDAOUT
LTC4309
READY
5V
5V
10k
100k
10k 10k
0.01μF
0.01μF
10k
FAULT FAULT
DISCENDISCEN
100ns/DIV
0
0
200mV/DIV
200
400
600
800
1000
100
200 300 400
4309 G01
500 600
SDAOUT
SDAIN
LOW
OFFSET
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
6356140, 6650174, 7032051.
LTC4309
2
4309fa
V
CC
, V
CC2
to GND ............................................–0.3 to 6V
SDAIN, SCLIN, SDAOUT, SCLOUT,
READY,
ENABLE, FAULT, ACC, DISCEN .......................–0.3 to 6V
Maximum Sink Current (SDA, SCL, FAULT, READY)
I
SINK
......................................................................50mA
(Note 1, 6)
Operating Temperature
LTC4309C ................................................ 0°C to 70°C
LTC4309I.............................................. –40°C to 85°C
Storage Temperature Range (DE)........... –65°C to 125°C
Storage Temperature Range (GN) .......... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
GN Package ...................................................... 300°C
12
11
10
9
8
7
1
2
3
4
5
6
V
CC
V
CC2
SDAOUT
SDAIN
FAULT
READY
ENABLE
DISCEN
SCLOUT
SCLIN
ACC
GND
TOP VIEW
13
DE12 PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
T
JMAX
= 125°C, θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) PCB CONNECTION TO GND IS OPTIONAL
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
ENABLE
NC
DISCEN
SCLOUT
SCLIN
ACC
NC
GND
V
CC
NC
V
CC2
SDAOU
T
SDAIN
FAULT
NC
READY
T
JMAX
= 150°C, θ
JA
= 110°C/W
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4309CDE#PBF LTC4309CDE#TRPBF 4309 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C
LTC4309IDE#PBF LTC4309IDE#TRPBF 4309 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C
LTC4309CGN#PBF LTC4309CGN#TRPBF 4309 16-Lead Plastic SSOP 0°C to 70°C
LTC4309IGN#PBF LTC4309IGN#TRPBF 4309I 16-Lead Plastic SSOP –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ABSOLUTE MAXIMUM RATINGS
LTC4309
3
4309fa
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
CC
= 3.3V, V
CC2
= 3.3V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
Positive Supply Voltage
l
2.3 5.5 V
V
CC2
Input Side Accelerator Supply Voltage
l
1.8 5.5 V
I
CC
V
CC
Input Supply Current Enabled V
CC
= V
CC2
= 5.5V, V
SDAIN
= V
SCLIN
= 0V (Note 2)
l
711 mA
I
SD
V
CC
Input Supply Current Disabled V
CC
= V
CC2
= 5.5V, SDA = SCL = 5.5V, ENABLE = OV
l
900 1400 μA
I
CC2
V
CC2
Input Supply Current Enabled V
CC
= V
CC2
= 5.5V, V
SDAIN
= V
SCLIN
= 0V (Note 2)
l
190 250 μA
I
SD2
V
CC2
Input Supply Current Disabled V
CC
= V
CC2
= 5.5V, SDA = SCL = 5.5V, ENABLE = OV
l
140 180 μA
Propagation Delay and Rise Time Accelerators
t
PHL
SDA/SCL Propagation Delay High to Low C
LOAD
= 50pF, 2.7k to V
CC
on SDA, SCL, (Note 3, 4), (Figure 1) 85 ns
t
PLH
SDA/SCL Propagation Delay Low to High C
LOAD
= 50pF, 2.7k to V
CC
on SDA, SCL, (Note 3, 4), (Figure 1) 10 ns
t
RISE
SDA/SCL Rise Time C
LOAD
= 100pF, 10k to V
CC
on SDA, SCL, V
CC
= 5V V
CC2
= 5V,
(Note 3, 5), (Figure 1)
30 300 ns
t
FALL
SDA/SCL Fall Time C
LOAD
= 100pF, 10k to V
CC
on SDA, SCL, V
CC
= 5V (Note 3, 5),
(Figure 1)
30 300 ns
I
PULLUPAC
Transient Boosted Pull-up Current Positive Transition > 0.8V/μS on SDA, SCL, V
CC
= 3.3V (Note 7) 5 8 mA
Start-Up Circuitry
V
PRE
Precharge Voltage SDA, SCL Open
l
0.8 1.0 1.2 V
t
IDLE
Bus Idle Time
l
55 95 175 μs
V
THR_EN
ENABLE Threshold Voltage ENABLE Rising Edge
l
0.8 1.4 2 V
V
THR_EN(HYST)
ENABLE Threshold Voltage Hysteresis (Note 3) 100 mV
V
THR_CTRL
ACC, DISCEN Threshold Voltage 0.5 0.7 1 V
I
CTRL
ENABLE, ACC, DISCEN Input Currents ENABLE, ACC, DISCEN from 0 to V
CC
l
0.1 ±5 μA
t
PLH_EN
ENABLE Delay Off-On (Figure 1) 95 μs
t
PHL_EN
ENABLE Delay On-Off (Note 3), (Figure 1) 10 ns
t
PLH_READY
READY Delay On-Off (Note 3), (Figure 1) 10 ns
t
PHL_READY
READY Delay Off-On (Note 3), (Figure 1) 10 ns
V
OL_READY
READY Output Low Voltage I
READY
= 3mA, V
CC
= 2.3V
l
0.4 V
I
OFF_READY
READY Off Leakage Current V
CC
= READY = 5.5V
l
0.1 ±5 μA
Timing Characteristics
f
I2C, MAX
I
2
C Maximum Operating Frequency (Note 3) 400 600 kHz
t
BUF
Bus Free Time Between Stop and Start
Condition
(Note 3) 1.3 μs
t
HD, STA
Hold Time After (Repeated)
Start Condition
(Note 3) 100 ns
t
SU, STA
Repeated Start Condition Set-Up Time (Note 3) 0 ns
t
SU, STO
Stop Condition Set-Up Time (Note 3) 0 ns
t
HD, DATI
Data Hold Time Input (Note 3) 0 ns
t
SU, DAT
Data Set-Up Time (Note 3) 100 ns
Input-Output Connection
V
OS
Input-Output Offset Voltage 2.7k to V
CC2
on SDA, SCL, Driven SDA, SCL = 0.2V
l
20 60 100 mV
V
THR
SDA, SCL Logic Input Threshold Voltage V
CC
≥ 2.9V
V
CC
< 2.9V
1.4
1.1
1.65
1.35
1.9
1.6
V
V
ELECTRICAL CHARACTERISTICS

LTC4309IDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Interface - Signal Buffers, Repeaters Low Offset Hot Swappable Bus Buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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