LTC4309
10
4309fa
has disconnected the input and output busses due to a
bus stuck low condition. READY goes high when ENABLE
is high and start-up is complete. The pin is driven by an
open drain pull-down device capable of sinking 3mA
while holding 0.4V on the pin. Connect a resistor to the
bus pull-up supply to provide the pull-up.
FAULT Digital Output
This pin provides a digital flag which is low when SDA
or SCL is low for 30ms (typical). The pin is driven by an
open drain pull-down capable of sinking 3mA while hold-
ing 0.4V on the pin. Connect a resistor from FAULT to the
bus pull-up supply to provide the pull-up.
Live Insertion and Capacitance Buffering Application
Figures 4 and 5 illustrate applications of the LTC4309 that
take advantage of the LTC4309’s Hot Swap
TM
, capacitance
buffering and precharge features. If the I/O cards were
plugged directly into the backplane without the LTC4309
buffer, all of the backplane and card capacitances would
add directly together, making rise time and fall time re-
quirements difficult to meet. Placing an LTC4309 on the
edge of each card, however, isolates the card capacitance
from the backplane. For a given I/O card, the LTC4309
drives the capacitance of everything on the card and the
backplane must drive only the capacitance of the LTC4309,
which is less than 10pF.
Figure 4 shows the LTC4309 used in the typical staggered
connector application, where V
CC
and GND are the longest
“early power” pins. The “early power” pins ensure the
LTC4309 is initially powered and forcing a 1V precharge
voltage on the medium length SDA and SCL pins before
they contact to the backplane busses. Coupled with
ENABLE as the shortest pin, passively pulled to ground
by a resistor, the staggered approach provides additional
time for transients associated with live insertion to settle
before the LTC4309 can be enabled.
Figure 5 shows the LTC4309 in an application where all
of the pins have the same length. In this application, a
resistor is used to hold the ENABLE pin low during live
insertion, until the backplane control circuitry can enable
the device.
Repeater/Bus Extender Applications
Users who wish to connect two 2-wire systems separated
by a distance can do so by connecting two LTC4309s back-
to-back, as shown in Figure 6. The I
2
C specification allows
for 400pF maximum bus capacitance, severely limiting
the length of the bus. The SMBus specification places no
restriction on bus capacitance, but the limited impedances
of devices connected to the bus require systems to remain
small if rise time and fall time specifications are to be met.
In this situation, the differential ground voltage between
the two systems may limit the allowed distance, because
a valid logic low voltage with respect to the ground at one
end of the system may violate the allowed V
OL
specification
with respect to the ground at the other end. In addition,
the connection circuitry offset voltages of the back-to-
back LTC4309s add together, directly contributing to the
same problem.
Figure 7 further illustrates a repeater application. In
AdvancedTCA applications, the bus pull-up resistance can
be quite small. Since there is no effect on the offset due
OPERATION
APPLICATIONS INFORMATION
Hot Swap is a trademark of Linear Technology Corporation.
ENABLE
When the ENABLE pin is driven below 0.8V with respect
to the LTC4309’s ground, the input pin is disconnected
from the output pin and the READY pin is internally pulled
low. When the pin is driven above 2V, the part waits for
data transactions on both the input and output pins to be
complete (as described in the Start-Up section) before
connecting the two sides. At this time the internal pull-
down on READY releases.
A rising edge on ENABLE after a fault has occurred forces a
connection between SDAIN, SDAOUT and SCLIN, SCLOUT,
even if the bus stuck low conditions has not been cleared.
At this time, the 30ms timer is reset, but not disabled.
LTC4309
11
4309fa
If the rise time accelerators are enabled, the bus pull-up
supply can be greater than or equal to V
CC
for the output
busses and accordingly, the input pull-up supply can
be greater than or equal to V
CC2
for the input busses.
This ensures the LTC4309’s rise time accelerators do
not source current through the pull-up resistors into the
pull-up supply. If the rise time accelerator circuitries are
disabled, the bus pull-up supply can be as low as 2V for
V
CC
≥ 2.9V and for V
CC
< 2.9V, the bus pull-up supply can
be as low as 1.7V. The bound on the lower supply limit
exists to ensure the bus signal range exceeds the logic
input threshold voltage, V
THR
.
Resistor Pull-Up Value Selection
To guarantee the rise time accelerators are activated during
a rising edge, the bus must rise on its own with a positive
slew rate of at least 0.8V/μs. To achieve this, choose a
maximum resistor value R
PULLUP
using the formula:
R
PULLUP
(V
BUS(MIN)
0.8V) 1250
ns
V
C
BUS
Where R
PULLUP
is the pull-up resistor value in kilo ohms,
V
BUS(MIN)
is the minimum bus pull-up supply voltage and
C
BUS
is the equivalent bus capacitance in pico-Farads
(pF).
To estimate the value of C
BUS
, use a general rule of 20pF
of capacitance per device on the bus (10pF for the device
and 10pF for interconnect).
In addition, R
PULLUP
must be strong enough to overcome
the precharge voltage and provide logic highs on SDAOUT
and SCLOUT for the start-up and connection circuitry to
connect the backplane to the card. Regardless of the bus
capacitance, always choose
R
PULLUP
V
BUS(MAX)
–V
THR
100μA
to the pull-up impedance, multiple LTC4309 buffers can
be used in a single system. This allows the user to divide
the line and device capacitances into more sections with
buffering and meet rise and fall times.
The LTC4309 disconnects when both bus I/O’s are above
0.48V and rising. In systems with large ground bounce,
if many devices are cascaded, the 0.48V threshold can be
exceeded, and the transients associated with the ground
bounce can appear to be a rising edge. Under this condition,
the LTC4309 with inputs above 0.48V may disconnect.
Level Shifting Applications
Systems requiring different supply voltages for the
backplane side and the card side can use the LTC4309
for bidirectional level shifting, as shown in Figure 6. The
LTC4309 can level shift between bus pull-up supplies as
low as 1.7V, with the accelerators disabled, to as high as
5.5V. Level shifting allows newer designs that require low
voltage supplies, such as EEPROMs and microcontrollers,
the capability to interface with legacy backplanes which
may be operating at higher supply voltages.
Systems with Supply Voltage Droop
In large 2-wire systems, the supply voltages seen by devices
at various points in the system can differ by a few hundred
millivolts or more. For proper operation, make sure that
the V
CC2(LTC4309)
is ≥ 1.8V, and V
CC(LTC4309)
≥ 2.3V.
Additional Pull-Up Supply Options
In typical applications, a pull-up resistor connected from
the LTC4309’s bus output pins to V
CC
and bus input pins
to V
CC2
or V
CC
, if V
CC2
is grounded, is suffi cient. However,
for unique applications, additional fl exibility is available for
bus pull-up supplies other than V
CC
or V
CC2
. One example
is shown in Figure 8. The expanded bus pull-up range is
dependent on the user confi guration of the rise time ac-
celerators and the supply voltage, V
CC
.
APPLICATIONS INFORMATION
LTC4309
12
4309fa
V
CC2
SDAIN
SCLIN
FAULT
READY
ENABLE
SDA
SCL
FAULT
READY
ENA1
DISCEN
SDAOUT
SCLOUT
ACC
C1
0.01μF
R5
10k
R1
10k
V
CC
V
CC2
BACKPLANE
CONNECTOR
BACKPLANE
CARD
CONNECTORS
ENAN
R2
10k
R3
10k
R4
10k
R10
10k
R6
10k
I/O PERIPHERAL CARD 1
LTC4309
V
CC
GND
LTC4309
V
CC
GND
CARD 1_SDA
CARD 1_SCL
V
CC2
SDAIN
SCLIN
FAULT
READY
ENABLE
DISCEN
SDAOUT
SCLOUT
ACC
R7
10k
C4
0.01μF
C3
0.01μF
C2
0.01μF
R8
10k
R9
10k
I/O PERIPHERAL CARD N
CARD N_SDA
CARD N_SCL
4309 F01
Figure 4. The LTC4309 in an Application with a Staggered Connector.
APPLICATIONS INFORMATION

LTC4309IDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Interface - Signal Buffers, Repeaters Low Offset Hot Swappable Bus Buffer
Lifecycle:
New from this manufacturer.
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