LT3050 Series
16
3050fa
External Programmable Current Limit (I
MAX
Pin)
The I
MAX
pin is the collector of a PNP which mirrors the
LT3050 output at a ratio of approximately 1:200 (see Block
Diagram). The I
MAX
pin is also the input to the precision
current limit amplifi er. If the output load increases to the
point where it causes the I
MAX
pin voltage to reach 0.6V,
the current limit amplifi er takes control of output regula-
tion so that the I
MAX
pin clamps at 0.6V, regardless of the
output voltage. The current limit threshold (I
LIMIT
) is set
by attaching a resistor (R
IMAX
) from I
MAX
to GND:
R
119.22 0.894 V
I
IMAX
OUT
LIMIT
=
This equation is empirically derived and partially compen-
sates for early voltage effects in the I
MAX
current mirror.
It is valid for an input voltage range from 0.6V above the
output to 10V above the output. It is valid for output volt-
ages up to 12V. The accuracy of this equation for setting
the resistor value is approximately ±1%. Unit values are
Amps, Volts, and Ohms.
In cases where the IN to OUT voltage exceeds 10V, fold-
back current limit will lower the internal current level limit,
possibly causing it to preempt the external programmable
current limit. See the Internal Current Limit vs V
IN
– V
OUT
graph in the Typical Performance Characteristics section.
If the external programmable current limit is not needed,
the I
MAX
pin must be connected to GND. The I
MAX
pin
requires a 10nF decoupling capacitor.
OPERATION
See the Typical Performance Characteristics section for
additional information.
FAULT Pin Operation
The FAULT pin is an open collector logic pin which asserts
during internal current limit, precision current limit, ther-
mal limit, or a minimum current fault. There is no internal
pull-up on the FAULT pin; an external pull-up resistor is
required. The FAULT pin provides drive for up to 100A
of pull-down current. Off state logic may be as high as
45V, regardless of the input voltage used. When asserted,
the FAULT pin drive circuitry adds 50A (nominal) of GND
pin current.
Depending on the I
MIN
capacitance, BYP capacitance,
and OUT capacitance, the FAULT pin may assert during
startup. Consideration should be given to masking the
FAULT signal during startup. The FAULT pin circuitry is
inactive (not asserted) during shutdown and when the
OUT pin is pulled above the IN pin.
Operation in Dropout
The LT3050 contains circuitry which prevents the PNP
output power device from saturating in dropout. This also
keeps the I
MON
, I
MIN
, and I
MAX
current mirrors functioning
accurately, even in dropout. However, this anti-saturation
circuitry becomes less active at lower output currents, so
there is some degradation of current mirror function for
output currents less than 10mA.
LT3050 Series
17
3050fa
The LT3050 is a micropower, low noise and low dropout
voltage, 100mA linear regulator with micropower shutdown,
programmable current limit, and diagnostic functions. The
device supplies up to 100mA at a typical dropout voltage
of 340mV and operates over a 2.2V to 45V input range.
A single external capacitor can provide low noise reference
performance and output soft-start functionality. For
example, connecting a 10nF capacitor from the REF/BYP pin
to GND lowers output noise to 30V
RMS
over a 10Hz to
100kHz bandwidth. This capacitor also soft-starts the
reference and prevents output voltage overshoot at turn-on.
The LT3050’s quiescent current is merely 45A but
provides fast transient response with a minimum low ESR
2.2F ceramic output capacitor. In shutdown, quiescent
current is less than 1A and the reference soft-start
capacitor is reset.
The LT3050 optimizes stability and transient response
with low ESR, ceramic output capacitors. The regulator
does not require the addition of ESR as is common with
other regulators. The LT3050 typically provides 0.1% line
regulation and 0.1% load regulation. Internal protection
circuitry includes reverse-battery protection, reverse-
output protection, reverse-current protection, current limit
with fold-back and thermal shutdown.
This “bullet-proof” protection set makes it ideal for use in
battery-powered, automotive and industrial systems.
In battery backup applications where the output is held
up by a backup battery and the input is pulled to ground,
the LT3050 acts like it has a diode in series with its output
and prevents reverse current fl ow.
Adjustable Operation
The adjustable LT3050 has an output voltage range of
0.6V to 44.5V. The output voltage is set by the ratio of
two external resistors, as shown in Figure 1. The device
servos the output to maintain the ADJ pin voltage at 0.6V
APPLICATIONS INFORMATION
Figure 1. Adjustable Operation
referenced to ground. The current in R1 is then equal to
0.6V/R1, and the current in R2 is the current in R1 minus
the ADJ pin bias current.
V
IN
V
OUT
IN OUT
LT3050
SHDN ADJ
GND
3050 F01
R2
R1
V
OUT
= 0.6V 1+
R2
R1
–I
ADJ
()
R2
V
ADJ
= 0.6V
I
ADJ
= 16nA at 25°C
OUTPUT RANGE = 0.6V to 44.5V
The ADJ pin bias current, 16nA at 25°C, fl ows from the
ADJ pin through R1 to GND. Calculate the output voltage
using the formula in Figure 1. The value of R1 should be
no greater than 124k to provide a minimum 5A load
current so that output voltage errors, caused by the ADJ
pin bias current, are minimized. Note that in shutdown,
the output is turned off and the divider current is zero.
Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias
Current vs Temperature appear in the Typical Performance
Characteristics Section.
The LT3050 is tested and specifi ed with the ADJ pin tied
to the OUT pin, yielding V
OUT
= 0.6V. Specifi cations for
output voltages greater than 0.6V are proportional to the
ratio of the desired output voltage to 0.6V: V
OUT
/0.6V. For
example, load regulation for an output current change
of 1mA to 100mA is –0.2mV (typical) at V
OUT
= 0.6V.
at V
OUT
= 12V, load regulation is:
12
06
02 4
V
V
mV mV
.
–.
()
=
LT3050 Series
18
3050fa
Table 1 shows 1% resistor divider values for some common
output voltages with a resistor divider current of 5µA.
Table 1. Output Voltage Resistor Divider Valves
V
OUT
(V) R1 (kΩ) R2 (kΩ)
1.2 118 118
1.5 121 182
1.8 124 249
2.5 115 365
3124499
3.3 124 562
5115845
Bypass Capacitance, Output Voltage Noise and
Transient Response
The LT3050 regulator provides low output voltage noise
over the 10Hz to 100kHz bandwidth while operating at
full load with the addition of a reference bypass capacitor
(C
REF/BYP
) from the REF/BYP pin to GND. A good quality,
low leakage capacitor is recommended. This capacitor will
bypass the internal reference of the regulator, providing a
low frequency noise pole. With the use of 10nF for C
REF/BYP,
the output voltage noise decreases to as low as 30µV
RMS
when the output voltage is set for 0.6V. For higher output
voltages (generated by using a feedback resistor divider),
the output voltage noise gains up accordingly when using
C
REF/BYP
by itself.
To lower the output voltage noise for higher output voltages,
include a feedforward capacitor (C
FF
) from V
OUT
to the
ADJ pin. A good quality, low leakage capacitor is recom-
mended. This capacitor will bypass the error amplifi er of
the regulator, providing a low frequency noise pole. With
the use of 10nF for both C
FF
and C
REF/BYP
, output voltage
noise decreases to 30µV
RMS
when the output voltage is
set to 5V by a 5µA feedback resistor divider. If the current
in the feedback resistor divider is doubled, C
FF
must also
be doubled to achieve equivalent noise performance.
Higher values of output voltage noise are often measured if
care is not exercised with regard to circuit layout and test-
ing. Crosstalk from nearby traces induces unwanted noise
onto the LT3050’s output. Power supply ripple rejection
must also be considered. The LT3050 regulator does not
have unlimited power supply rejection and passes a small
portion of the input noise through to the output.
APPLICATIONS INFORMATION
Using a feedforward capacitor (C
FF
) from V
OUT
to the ADJ
pin has the added benefi t of improving transient response
for output voltages greater than 0.6V. With no feedforward
capacitor, the settling time will increase as the output
voltage is raised above 0.6V. Use the equation in Figure 2
to determine the minimum value of C
FF
to achieve a
transient response that is similar to 0.6V output voltage
performance regardless of the chosen output voltage
(See Figure 3 and Transient Response in the Typical Perf-
ormance Characteristics section).
During start-up, the internal reference will soft-start if a
reference bypass capacitor is present. Regulator start-
up time is directly proportional to the size of the bypass
capacitor, slowing to 6ms with a 10nF bypass capacitor
(See Start-up Time vs REF/BYP Capacitor in the Typical
Performance Characteristics section). The reference by-
pass capacitor is actively pulled low during shutdown to
reset the internal reference.
3050 F02
IN
SHDN
OUT
ADJ
GND REF/BYP
LT3050-5
V
IN
V
OUT
C
REF/BYP
C
FF
C
OUT
C
FF
10nF
10µA
I
FB DIVIDER
()
I
FB DIVIDER
=
V
OUT
R1+R2
10µA FOR FIXED V
OUT
()
100µs/DIV
V
OUT
= 5V
C
OUT
= 10µF
I
FB-DIVIDER
= 10µA
0
1nF
10nF
LOAD CURRENT
100mA/DIV
FEEDFORWARD
CAPACITOR, C
FF
100pF
3050 F03
V
OUT
50mV/DIV
Figure 2. Feedforward Capacitor for Fast Transient Response
Figure 3. Transient Response vs Feedforward Capacitor

LT3050EDDB-3.3#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 100mA, Low Noise Linear Regulator with Precision Current Limit and Diagnostic Functions
Lifecycle:
New from this manufacturer.
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