13
FN8195.1
April 26, 2006
A.C. TEST CONDITIONS EQUIVALENT A.C. LOAD CIRCUIT
AC TIMING
I
nput pulse levels V
CC
x 0.1 to V
CC
x 0.9
Input rise and fall times 10ns
Input and output timing level V
CC
x 0.5
5V
1533Ω
100pF
SDA Output
Symbol Parameter Min. Max. Units
f
SCK
SSI/SPI Clock Frequency 2.0 MHz
t
CYC
SSI/SPI Clock Cycle Time 500 ns
t
WH
SSI/SPI Clock High Time 200 ns
t
WL
SSI/SPI Clock Low Time 200 ns
t
LEAD
Lead Time 250 ns
t
LAG
Lag Time 250 ns
t
SU
SI, SCK, HOLD and CS Input Setup Time 50 ns
t
H
SI, SCK, HOLD and CS Input Hold Time 50 ns
t
RI
SI, SCK, HOLD and CS Input Rise Time 2 µs
t
FI
SI, SCK, HOLD and CS Input Fall Time 2 µs
t
DIS
SO Output Disable Time 0 500 ns
t
V
SO Output Valid Time 100 ns
t
HO
SO Output Hold Time 0 ns
t
RO
SO Output Rise Time 50 ns
t
FO
SO Output Fall Time 50 ns
t
HOLD
HOLD Time 400 ns
t
HSU
HOLD Setup Time 100 ns
t
HH
HOLD Hold Time 100 ns
t
HZ
HOLD Low to Output in High Z 100 ns
t
LZ
HOLD High to Output in Low Z 100 ns
T
I
Noise Suppression Time Constant at SI, SCK, HOLD and CS inputs 20 ns
t
CS
CS Deselect Time 2 µs
t
WPASU
WP, A0 and A1 Setup Time 0 ns
t
WPAH
WP, A0 and A1 Hold Time 0 ns
X9420
